40 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,  in nvkm_clk_adjust()  argument
43 	struct nvkm_bios *bios = nvkm_bios(clk);  in nvkm_clk_adjust()
78 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)  in nvkm_cstate_prog()  argument
80 	struct nvkm_therm *ptherm = nvkm_therm(clk);  in nvkm_cstate_prog()
81 	struct nvkm_volt *volt = nvkm_volt(clk);  in nvkm_cstate_prog()
94 			nv_error(clk, "failed to raise fan speed: %d\n", ret);  in nvkm_cstate_prog()
102 			nv_error(clk, "failed to raise voltage: %d\n", ret);  in nvkm_cstate_prog()
107 	ret = clk->calc(clk, cstate);  in nvkm_cstate_prog()
109 		ret = clk->prog(clk);  in nvkm_cstate_prog()
110 		clk->tidy(clk);  in nvkm_cstate_prog()
116 			nv_error(clk, "failed to lower voltage: %d\n", ret);  in nvkm_cstate_prog()
122 			nv_error(clk, "failed to lower fan speed: %d\n", ret);  in nvkm_cstate_prog()
136 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)  in nvkm_cstate_new()  argument
138 	struct nvkm_bios *bios = nvkm_bios(clk);  in nvkm_cstate_new()
139 	struct nvkm_domain *domain = clk->domains;  in nvkm_cstate_new()
158 			u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,  in nvkm_cstate_new()
173 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)  in nvkm_pstate_prog()  argument
175 	struct nvkm_fb *pfb = nvkm_fb(clk);  in nvkm_pstate_prog()
179 	list_for_each_entry(pstate, &clk->states, head) {  in nvkm_pstate_prog()
184 	nv_debug(clk, "setting performance state %d\n", pstatei);  in nvkm_pstate_prog()
185 	clk->pstate = pstatei;  in nvkm_pstate_prog()
197 	return nvkm_cstate_prog(clk, pstate, 0);  in nvkm_pstate_prog()
203 	struct nvkm_clk *clk = container_of(work, typeof(*clk), work);  in nvkm_pstate_work()  local
206 	if (!atomic_xchg(&clk->waiting, 0))  in nvkm_pstate_work()
208 	clk->pwrsrc = power_supply_is_system_supplied();  in nvkm_pstate_work()
210 	nv_trace(clk, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d D %d\n",  in nvkm_pstate_work()
211 		 clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,  in nvkm_pstate_work()
212 		 clk->astate, clk->tstate, clk->dstate);  in nvkm_pstate_work()
214 	pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;  in nvkm_pstate_work()
215 	if (clk->state_nr && pstate != -1) {  in nvkm_pstate_work()
216 		pstate = (pstate < 0) ? clk->astate : pstate;  in nvkm_pstate_work()
217 		pstate = min(pstate, clk->state_nr - 1 - clk->tstate);  in nvkm_pstate_work()
218 		pstate = max(pstate, clk->dstate);  in nvkm_pstate_work()
220 		pstate = clk->pstate = -1;  in nvkm_pstate_work()
223 	nv_trace(clk, "-> %d\n", pstate);  in nvkm_pstate_work()
224 	if (pstate != clk->pstate) {  in nvkm_pstate_work()
225 		int ret = nvkm_pstate_prog(clk, pstate);  in nvkm_pstate_work()
227 			nv_error(clk, "error setting pstate %d: %d\n",  in nvkm_pstate_work()
232 	wake_up_all(&clk->wait);  in nvkm_pstate_work()
233 	nvkm_notify_get(&clk->pwrsrc_ntfy);  in nvkm_pstate_work()
237 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)  in nvkm_pstate_calc()  argument
239 	atomic_set(&clk->waiting, 1);  in nvkm_pstate_calc()
240 	schedule_work(&clk->work);  in nvkm_pstate_calc()
242 		wait_event(clk->wait, !atomic_read(&clk->waiting));  in nvkm_pstate_calc()
247 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)  in nvkm_pstate_info()  argument
249 	struct nvkm_domain *clock = clk->domains - 1;  in nvkm_pstate_info()
264 		nv_debug(clk, "%02x: %10d KHz\n", clock->name, lo);  in nvkm_pstate_info()
269 			nv_debug(clk, "%10d KHz\n", freq);  in nvkm_pstate_info()
285 	nv_info(clk, "%s: %s %s %s\n", name, info[0], info[1], info[2]);  in nvkm_pstate_info()
302 nvkm_pstate_new(struct nvkm_clk *clk, int idx)  in nvkm_pstate_new()  argument
304 	struct nvkm_bios *bios = nvkm_bios(clk);  in nvkm_pstate_new()
305 	struct nvkm_domain *domain = clk->domains - 1;  in nvkm_pstate_new()
344 			perfS.v40.freq = nvkm_clk_adjust(clk, false,  in nvkm_pstate_new()
357 			nvkm_cstate_new(clk, idx, pstate);  in nvkm_pstate_new()
361 	nvkm_pstate_info(clk, pstate);  in nvkm_pstate_new()
362 	list_add_tail(&pstate->head, &clk->states);  in nvkm_pstate_new()
363 	clk->state_nr++;  in nvkm_pstate_new()
371 nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)  in nvkm_clk_ustate_update()  argument
376 	if (!clk->allow_reclock)  in nvkm_clk_ustate_update()
380 		list_for_each_entry(pstate, &clk->states, head) {  in nvkm_clk_ustate_update()
395 nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)  in nvkm_clk_nstate()  argument
399 	if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))  in nvkm_clk_nstate()
408 			ret = nvkm_clk_ustate_update(clk, v);  in nvkm_clk_nstate()
419 nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)  in nvkm_clk_ustate()  argument
421 	int ret = nvkm_clk_ustate_update(clk, req);  in nvkm_clk_ustate()
423 		if (ret -= 2, pwr) clk->ustate_ac = ret;  in nvkm_clk_ustate()
424 		else		   clk->ustate_dc = ret;  in nvkm_clk_ustate()
425 		return nvkm_pstate_calc(clk, true);  in nvkm_clk_ustate()
431 nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)  in nvkm_clk_astate()  argument
433 	if (!rel) clk->astate  = req;  in nvkm_clk_astate()
434 	if ( rel) clk->astate += rel;  in nvkm_clk_astate()
435 	clk->astate = min(clk->astate, clk->state_nr - 1);  in nvkm_clk_astate()
436 	clk->astate = max(clk->astate, 0);  in nvkm_clk_astate()
437 	return nvkm_pstate_calc(clk, wait);  in nvkm_clk_astate()
441 nvkm_clk_tstate(struct nvkm_clk *clk, int req, int rel)  in nvkm_clk_tstate()  argument
443 	if (!rel) clk->tstate  = req;  in nvkm_clk_tstate()
444 	if ( rel) clk->tstate += rel;  in nvkm_clk_tstate()
445 	clk->tstate = min(clk->tstate, 0);  in nvkm_clk_tstate()
446 	clk->tstate = max(clk->tstate, -(clk->state_nr - 1));  in nvkm_clk_tstate()
447 	return nvkm_pstate_calc(clk, true);  in nvkm_clk_tstate()
451 nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)  in nvkm_clk_dstate()  argument
453 	if (!rel) clk->dstate  = req;  in nvkm_clk_dstate()
454 	if ( rel) clk->dstate += rel;  in nvkm_clk_dstate()
455 	clk->dstate = min(clk->dstate, clk->state_nr - 1);  in nvkm_clk_dstate()
456 	clk->dstate = max(clk->dstate, 0);  in nvkm_clk_dstate()
457 	return nvkm_pstate_calc(clk, true);  in nvkm_clk_dstate()
463 	struct nvkm_clk *clk =  in nvkm_clk_pwrsrc()  local
464 		container_of(notify, typeof(*clk), pwrsrc_ntfy);  in nvkm_clk_pwrsrc()
465 	nvkm_pstate_calc(clk, false);  in nvkm_clk_pwrsrc()
476 	struct nvkm_clk *clk = (void *)object;  in _nvkm_clk_fini()  local
477 	nvkm_notify_put(&clk->pwrsrc_ntfy);  in _nvkm_clk_fini()
478 	return nvkm_subdev_fini(&clk->base, suspend);  in _nvkm_clk_fini()
484 	struct nvkm_clk *clk = (void *)object;  in _nvkm_clk_init()  local
485 	struct nvkm_domain *clock = clk->domains;  in _nvkm_clk_init()
488 	ret = nvkm_subdev_init(&clk->base);  in _nvkm_clk_init()
492 	memset(&clk->bstate, 0x00, sizeof(clk->bstate));  in _nvkm_clk_init()
493 	INIT_LIST_HEAD(&clk->bstate.list);  in _nvkm_clk_init()
494 	clk->bstate.pstate = 0xff;  in _nvkm_clk_init()
497 		ret = clk->read(clk, clock->name);  in _nvkm_clk_init()
499 			nv_error(clk, "%02x freq unknown\n", clock->name);  in _nvkm_clk_init()
502 		clk->bstate.base.domain[clock->name] = ret;  in _nvkm_clk_init()
506 	nvkm_pstate_info(clk, &clk->bstate);  in _nvkm_clk_init()
508 	clk->astate = clk->state_nr - 1;  in _nvkm_clk_init()
509 	clk->tstate = 0;  in _nvkm_clk_init()
510 	clk->dstate = 0;  in _nvkm_clk_init()
511 	clk->pstate = -1;  in _nvkm_clk_init()
512 	nvkm_pstate_calc(clk, true);  in _nvkm_clk_init()
519 	struct nvkm_clk *clk = (void *)object;  in _nvkm_clk_dtor()  local
522 	nvkm_notify_fini(&clk->pwrsrc_ntfy);  in _nvkm_clk_dtor()
524 	list_for_each_entry_safe(pstate, temp, &clk->states, head) {  in _nvkm_clk_dtor()
528 	nvkm_subdev_destroy(&clk->base);  in _nvkm_clk_dtor()
538 	struct nvkm_clk *clk;  in nvkm_clk_create_()  local
544 	clk = *object;  in nvkm_clk_create_()
548 	INIT_LIST_HEAD(&clk->states);  in nvkm_clk_create_()
549 	clk->domains = clocks;  in nvkm_clk_create_()
550 	clk->ustate_ac = -1;  in nvkm_clk_create_()
551 	clk->ustate_dc = -1;  in nvkm_clk_create_()
553 	INIT_WORK(&clk->work, nvkm_pstate_work);  in nvkm_clk_create_()
554 	init_waitqueue_head(&clk->wait);  in nvkm_clk_create_()
555 	atomic_set(&clk->waiting, 0);  in nvkm_clk_create_()
561 			ret = nvkm_pstate_new(clk, idx++);  in nvkm_clk_create_()
565 			list_add_tail(&pstates[idx].head, &clk->states);  in nvkm_clk_create_()
566 		clk->state_nr = nb_pstates;  in nvkm_clk_create_()
569 	clk->allow_reclock = allow_reclock;  in nvkm_clk_create_()
572 			       NULL, 0, 0, &clk->pwrsrc_ntfy);  in nvkm_clk_create_()
578 		clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);  in nvkm_clk_create_()
579 		clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);  in nvkm_clk_create_()
584 		clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);  in nvkm_clk_create_()
588 		clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);  in nvkm_clk_create_()