Lines Matching refs:pbus
30 nv50_bus_hwsq_exec(struct nvkm_bus *pbus, u32 *data, u32 size) in nv50_bus_hwsq_exec() argument
32 struct nv50_bus_priv *priv = (void *)pbus; in nv50_bus_hwsq_exec()
35 nv_mask(pbus, 0x001098, 0x00000008, 0x00000000); in nv50_bus_hwsq_exec()
36 nv_wr32(pbus, 0x001304, 0x00000000); in nv50_bus_hwsq_exec()
39 nv_mask(pbus, 0x001098, 0x00000018, 0x00000018); in nv50_bus_hwsq_exec()
40 nv_wr32(pbus, 0x00130c, 0x00000003); in nv50_bus_hwsq_exec()
42 return nv_wait(pbus, 0x001308, 0x00000100, 0x00000000) ? 0 : -ETIMEDOUT; in nv50_bus_hwsq_exec()
48 struct nvkm_bus *pbus = nvkm_bus(subdev); in nv50_bus_intr() local
49 u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); in nv50_bus_intr()
52 u32 addr = nv_rd32(pbus, 0x009084); in nv50_bus_intr()
53 u32 data = nv_rd32(pbus, 0x009088); in nv50_bus_intr()
55 nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", in nv50_bus_intr()
60 nv_wr32(pbus, 0x001100, 0x00000008); in nv50_bus_intr()
64 subdev = nvkm_subdev(pbus, NVDEV_SUBDEV_THERM); in nv50_bus_intr()
68 nv_wr32(pbus, 0x001100, 0x00010000); in nv50_bus_intr()
72 nv_error(pbus, "unknown intr 0x%08x\n", stat); in nv50_bus_intr()
73 nv_mask(pbus, 0x001140, stat, 0); in nv50_bus_intr()