29 nvbios_timingTe(struct nvkm_bios *bios,  in nvbios_timingTe()  argument
35 	if (!bit_entry(bios, 'P', &bit_P)) {  in nvbios_timingTe()
37 			timing = nv_ro16(bios, bit_P.offset + 4);  in nvbios_timingTe()
40 			timing = nv_ro16(bios, bit_P.offset + 8);  in nvbios_timingTe()
43 			*ver = nv_ro08(bios, timing + 0);  in nvbios_timingTe()
46 				*hdr = nv_ro08(bios, timing + 1);  in nvbios_timingTe()
47 				*cnt = nv_ro08(bios, timing + 2);  in nvbios_timingTe()
48 				*len = nv_ro08(bios, timing + 3);  in nvbios_timingTe()
53 				*hdr = nv_ro08(bios, timing + 1);  in nvbios_timingTe()
54 				*cnt = nv_ro08(bios, timing + 5);  in nvbios_timingTe()
55 				*len = nv_ro08(bios, timing + 2);  in nvbios_timingTe()
56 				*snr = nv_ro08(bios, timing + 4);  in nvbios_timingTe()
57 				*ssz = nv_ro08(bios, timing + 3);  in nvbios_timingTe()
69 nvbios_timingEe(struct nvkm_bios *bios, int idx,  in nvbios_timingEe()  argument
73 	u16 timing = nvbios_timingTe(bios, ver, hdr, cnt, len, &snr, &ssz);  in nvbios_timingEe()
85 nvbios_timingEp(struct nvkm_bios *bios, int idx,  in nvbios_timingEp()  argument
88 	u16 data = nvbios_timingEe(bios, idx, ver, hdr, cnt, len), temp;  in nvbios_timingEp()
93 		p->timing_10_WR    = nv_ro08(bios, data + 0x00);  in nvbios_timingEp()
94 		p->timing_10_WTR   = nv_ro08(bios, data + 0x01);  in nvbios_timingEp()
95 		p->timing_10_CL    = nv_ro08(bios, data + 0x02);  in nvbios_timingEp()
96 		p->timing_10_RC    = nv_ro08(bios, data + 0x03);  in nvbios_timingEp()
97 		p->timing_10_RFC   = nv_ro08(bios, data + 0x05);  in nvbios_timingEp()
98 		p->timing_10_RAS   = nv_ro08(bios, data + 0x07);  in nvbios_timingEp()
99 		p->timing_10_RP    = nv_ro08(bios, data + 0x09);  in nvbios_timingEp()
100 		p->timing_10_RCDRD = nv_ro08(bios, data + 0x0a);  in nvbios_timingEp()
101 		p->timing_10_RCDWR = nv_ro08(bios, data + 0x0b);  in nvbios_timingEp()
102 		p->timing_10_RRD   = nv_ro08(bios, data + 0x0c);  in nvbios_timingEp()
103 		p->timing_10_13    = nv_ro08(bios, data + 0x0d);  in nvbios_timingEp()
104 		p->timing_10_ODT   = nv_ro08(bios, data + 0x0e) & 0x07;  in nvbios_timingEp()
115 			p->timing_10_24  = nv_ro08(bios, data + 0x18);  in nvbios_timingEp()
119 			p->timing_10_21  = nv_ro08(bios, data + 0x15);  in nvbios_timingEp()
121 			p->timing_10_20  = nv_ro08(bios, data + 0x14);  in nvbios_timingEp()
123 			p->timing_10_CWL = nv_ro08(bios, data + 0x13);  in nvbios_timingEp()
125 			p->timing_10_18  = nv_ro08(bios, data + 0x12);  in nvbios_timingEp()
128 			p->timing_10_16  = nv_ro08(bios, data + 0x10);  in nvbios_timingEp()
133 		p->timing[0] = nv_ro32(bios, data + 0x00);  in nvbios_timingEp()
134 		p->timing[1] = nv_ro32(bios, data + 0x04);  in nvbios_timingEp()
135 		p->timing[2] = nv_ro32(bios, data + 0x08);  in nvbios_timingEp()
136 		p->timing[3] = nv_ro32(bios, data + 0x0c);  in nvbios_timingEp()
137 		p->timing[4] = nv_ro32(bios, data + 0x10);  in nvbios_timingEp()
138 		p->timing[5] = nv_ro32(bios, data + 0x14);  in nvbios_timingEp()
139 		p->timing[6] = nv_ro32(bios, data + 0x18);  in nvbios_timingEp()
140 		p->timing[7] = nv_ro32(bios, data + 0x1c);  in nvbios_timingEp()
141 		p->timing[8] = nv_ro32(bios, data + 0x20);  in nvbios_timingEp()
142 		p->timing[9] = nv_ro32(bios, data + 0x24);  in nvbios_timingEp()
143 		p->timing[10] = nv_ro32(bios, data + 0x28);  in nvbios_timingEp()
144 		p->timing_20_2e_03 = (nv_ro08(bios, data + 0x2e) & 0x03) >> 0;  in nvbios_timingEp()
145 		p->timing_20_2e_30 = (nv_ro08(bios, data + 0x2e) & 0x30) >> 4;  in nvbios_timingEp()
146 		p->timing_20_2e_c0 = (nv_ro08(bios, data + 0x2e) & 0xc0) >> 6;  in nvbios_timingEp()
147 		p->timing_20_2f_03 = (nv_ro08(bios, data + 0x2f) & 0x03) >> 0;  in nvbios_timingEp()
148 		temp = nv_ro16(bios, data + 0x2c);  in nvbios_timingEp()
151 		p->timing_20_30_07 = (nv_ro08(bios, data + 0x30) & 0x07) >> 0;  in nvbios_timingEp()
152 		p->timing_20_30_f8 = (nv_ro08(bios, data + 0x30) & 0xf8) >> 3;  in nvbios_timingEp()
153 		temp = nv_ro16(bios, data + 0x31);  in nvbios_timingEp()