Lines Matching refs:init
41 nv_printk(init->bios, lvl, "0x%04x[%c]: "fmt, init->offset, \
42 init_exec(init) ? '0' + (init->nested - 1) : ' ', ##args); \
45 if (nv_subdev(init->bios)->debug >= NV_DBG_TRACE) \
57 init_exec(struct nvbios_init *init) in init_exec() argument
59 return (init->execute == 1) || ((init->execute & 5) == 5); in init_exec()
63 init_exec_set(struct nvbios_init *init, bool exec) in init_exec_set() argument
65 if (exec) init->execute &= 0xfd; in init_exec_set()
66 else init->execute |= 0x02; in init_exec_set()
70 init_exec_inv(struct nvbios_init *init) in init_exec_inv() argument
72 init->execute ^= 0x02; in init_exec_inv()
76 init_exec_force(struct nvbios_init *init, bool exec) in init_exec_force() argument
78 if (exec) init->execute |= 0x04; in init_exec_force()
79 else init->execute &= 0xfb; in init_exec_force()
87 init_or(struct nvbios_init *init) in init_or() argument
89 if (init_exec(init)) { in init_or()
90 if (init->outp) in init_or()
91 return ffs(init->outp->or) - 1; in init_or()
98 init_link(struct nvbios_init *init) in init_link() argument
100 if (init_exec(init)) { in init_link()
101 if (init->outp) in init_link()
102 return !(init->outp->sorconf.link & 1); in init_link()
109 init_crtc(struct nvbios_init *init) in init_crtc() argument
111 if (init_exec(init)) { in init_crtc()
112 if (init->crtc >= 0) in init_crtc()
113 return init->crtc; in init_crtc()
120 init_conn(struct nvbios_init *init) in init_conn() argument
122 struct nvkm_bios *bios = init->bios; in init_conn()
127 if (init_exec(init)) { in init_conn()
128 if (init->outp) { in init_conn()
129 conn = init->outp->connector; in init_conn()
142 init_nvreg(struct nvbios_init *init, u32 reg) in init_nvreg() argument
144 struct nvkm_devinit *devinit = nvkm_devinit(init->bios); in init_nvreg()
157 if (nv_device(init->bios)->card_type >= NV_50) { in init_nvreg()
159 reg += init_crtc(init) * 0x800; in init_nvreg()
164 reg += init_or(init) * 0x800; in init_nvreg()
167 reg += init_link(init) * 0x80; in init_nvreg()
182 init_rd32(struct nvbios_init *init, u32 reg) in init_rd32() argument
184 reg = init_nvreg(init, reg); in init_rd32()
185 if (reg != ~0 && init_exec(init)) in init_rd32()
186 return nv_rd32(init->subdev, reg); in init_rd32()
191 init_wr32(struct nvbios_init *init, u32 reg, u32 val) in init_wr32() argument
193 reg = init_nvreg(init, reg); in init_wr32()
194 if (reg != ~0 && init_exec(init)) in init_wr32()
195 nv_wr32(init->subdev, reg, val); in init_wr32()
199 init_mask(struct nvbios_init *init, u32 reg, u32 mask, u32 val) in init_mask() argument
201 reg = init_nvreg(init, reg); in init_mask()
202 if (reg != ~0 && init_exec(init)) { in init_mask()
203 u32 tmp = nv_rd32(init->subdev, reg); in init_mask()
204 nv_wr32(init->subdev, reg, (tmp & ~mask) | val); in init_mask()
211 init_rdport(struct nvbios_init *init, u16 port) in init_rdport() argument
213 if (init_exec(init)) in init_rdport()
214 return nv_rdport(init->subdev, init->crtc, port); in init_rdport()
219 init_wrport(struct nvbios_init *init, u16 port, u8 value) in init_wrport() argument
221 if (init_exec(init)) in init_wrport()
222 nv_wrport(init->subdev, init->crtc, port, value); in init_wrport()
226 init_rdvgai(struct nvbios_init *init, u16 port, u8 index) in init_rdvgai() argument
228 struct nvkm_subdev *subdev = init->subdev; in init_rdvgai()
229 if (init_exec(init)) { in init_rdvgai()
230 int head = init->crtc < 0 ? 0 : init->crtc; in init_rdvgai()
237 init_wrvgai(struct nvbios_init *init, u16 port, u8 index, u8 value) in init_wrvgai() argument
240 if (nv_device(init->subdev)->card_type < NV_50) { in init_wrvgai()
242 init->crtc = 0; in init_wrvgai()
245 if (init_exec(init)) { in init_wrvgai()
246 int head = init->crtc < 0 ? 0 : init->crtc; in init_wrvgai()
247 nv_wrvgai(init->subdev, head, port, index, value); in init_wrvgai()
251 if (nv_device(init->subdev)->card_type < NV_50) { in init_wrvgai()
253 init->crtc = 1; in init_wrvgai()
258 init_i2c(struct nvbios_init *init, int index) in init_i2c() argument
260 struct nvkm_i2c *i2c = nvkm_i2c(init->bios); in init_i2c()
264 if (init->outp && init->outp->i2c_upper_default) in init_i2c()
268 if (!init->outp) { in init_i2c()
269 if (init_exec(init)) in init_i2c()
274 if (index == -2 && init->outp->location) { in init_i2c()
275 index = NV_I2C_TYPE_EXTAUX(init->outp->extdev); in init_i2c()
279 index = init->outp->i2c_index; in init_i2c()
280 if (init->outp->type == DCB_OUTPUT_DP) in init_i2c()
288 init_rdi2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg) in init_rdi2cr() argument
290 struct nvkm_i2c_port *port = init_i2c(init, index); in init_rdi2cr()
291 if (port && init_exec(init)) in init_rdi2cr()
297 init_wri2cr(struct nvbios_init *init, u8 index, u8 addr, u8 reg, u8 val) in init_wri2cr() argument
299 struct nvkm_i2c_port *port = init_i2c(init, index); in init_wri2cr()
300 if (port && init_exec(init)) in init_wri2cr()
306 init_rdauxr(struct nvbios_init *init, u32 addr) in init_rdauxr() argument
308 struct nvkm_i2c_port *port = init_i2c(init, -2); in init_rdauxr()
311 if (port && init_exec(init)) { in init_rdauxr()
322 init_wrauxr(struct nvbios_init *init, u32 addr, u8 data) in init_wrauxr() argument
324 struct nvkm_i2c_port *port = init_i2c(init, -2); in init_wrauxr()
325 if (port && init_exec(init)) { in init_wrauxr()
335 init_prog_pll(struct nvbios_init *init, u32 id, u32 freq) in init_prog_pll() argument
337 struct nvkm_devinit *devinit = nvkm_devinit(init->bios); in init_prog_pll()
338 if (devinit->pll_set && init_exec(init)) { in init_prog_pll()
368 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
370 struct nvkm_bios *bios = init->bios; in init_table_()
402 struct nvbios_init init = { .bios = bios }; in init_script() local
413 data = init_script_table(&init); in init_script()
430 init_ram_restrict_group_count(struct nvbios_init *init) in init_ram_restrict_group_count() argument
432 return nvbios_ramcfg_count(init->bios); in init_ram_restrict_group_count()
436 init_ram_restrict(struct nvbios_init *init) in init_ram_restrict() argument
446 if (!init->ramcfg || init->bios->version.major < 0x70) in init_ram_restrict()
447 init->ramcfg = 0x80000000 | nvbios_ramcfg_index(init->subdev); in init_ram_restrict()
448 return (init->ramcfg & 0x7fffffff); in init_ram_restrict()
452 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
454 struct nvkm_bios *bios = init->bios; in init_xlat_()
455 u16 table = init_xlat_table(init); in init_xlat_()
470 init_condition_met(struct nvbios_init *init, u8 cond) in init_condition_met() argument
472 struct nvkm_bios *bios = init->bios; in init_condition_met()
473 u16 table = init_condition_table(init); in init_condition_met()
480 return (init_rd32(init, reg) & msk) == val; in init_condition_met()
486 init_io_condition_met(struct nvbios_init *init, u8 cond) in init_io_condition_met() argument
488 struct nvkm_bios *bios = init->bios; in init_io_condition_met()
489 u16 table = init_io_condition_table(init); in init_io_condition_met()
497 return (init_rdvgai(init, port, index) & mask) == value; in init_io_condition_met()
503 init_io_flag_condition_met(struct nvbios_init *init, u8 cond) in init_io_flag_condition_met() argument
505 struct nvkm_bios *bios = init->bios; in init_io_flag_condition_met()
506 u16 table = init_io_flag_condition_table(init); in init_io_flag_condition_met()
515 u8 ioval = (init_rdvgai(init, port, index) & mask) >> shift; in init_io_flag_condition_met()
530 init_tmds_reg(struct nvbios_init *init, u8 tmds) in init_tmds_reg() argument
546 if (init->outp) { in init_tmds_reg()
547 u32 dacoffset = pramdac_offset[init->outp->or]; in init_tmds_reg()
553 if (init_exec(init)) in init_tmds_reg()
574 init_reserved(struct nvbios_init *init) in init_reserved() argument
576 u8 opcode = nv_ro08(init->bios, init->offset); in init_reserved()
590 cont(" 0x%02x", nv_ro08(init->bios, init->offset + i)); in init_reserved()
592 init->offset += length; in init_reserved()
600 init_done(struct nvbios_init *init) in init_done() argument
603 init->offset = 0x0000; in init_done()
611 init_io_restrict_prog(struct nvbios_init *init) in init_io_restrict_prog() argument
613 struct nvkm_bios *bios = init->bios; in init_io_restrict_prog()
614 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_prog()
615 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_prog()
616 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_prog()
617 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_prog()
618 u8 count = nv_ro08(bios, init->offset + 6); in init_io_restrict_prog()
619 u32 reg = nv_ro32(bios, init->offset + 7); in init_io_restrict_prog()
625 init->offset += 11; in init_io_restrict_prog()
627 conf = (init_rdvgai(init, port, index) & mask) >> shift; in init_io_restrict_prog()
629 u32 data = nv_ro32(bios, init->offset); in init_io_restrict_prog()
633 init_wr32(init, reg, data); in init_io_restrict_prog()
638 init->offset += 4; in init_io_restrict_prog()
648 init_repeat(struct nvbios_init *init) in init_repeat() argument
650 struct nvkm_bios *bios = init->bios; in init_repeat()
651 u8 count = nv_ro08(bios, init->offset + 1); in init_repeat()
652 u16 repeat = init->repeat; in init_repeat()
655 init->offset += 2; in init_repeat()
657 init->repeat = init->offset; in init_repeat()
658 init->repend = init->offset; in init_repeat()
660 init->offset = init->repeat; in init_repeat()
661 nvbios_exec(init); in init_repeat()
665 init->offset = init->repend; in init_repeat()
666 init->repeat = repeat; in init_repeat()
674 init_io_restrict_pll(struct nvbios_init *init) in init_io_restrict_pll() argument
676 struct nvkm_bios *bios = init->bios; in init_io_restrict_pll()
677 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_pll()
678 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_pll()
679 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_pll()
680 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_pll()
681 s8 iofc = nv_ro08(bios, init->offset + 6); in init_io_restrict_pll()
682 u8 count = nv_ro08(bios, init->offset + 7); in init_io_restrict_pll()
683 u32 reg = nv_ro32(bios, init->offset + 8); in init_io_restrict_pll()
689 init->offset += 12; in init_io_restrict_pll()
691 conf = (init_rdvgai(init, port, index) & mask) >> shift; in init_io_restrict_pll()
693 u32 freq = nv_ro16(bios, init->offset) * 10; in init_io_restrict_pll()
697 if (iofc > 0 && init_io_flag_condition_met(init, iofc)) in init_io_restrict_pll()
699 init_prog_pll(init, reg, freq); in init_io_restrict_pll()
704 init->offset += 2; in init_io_restrict_pll()
714 init_end_repeat(struct nvbios_init *init) in init_end_repeat() argument
717 init->offset += 1; in init_end_repeat()
719 if (init->repeat) { in init_end_repeat()
720 init->repend = init->offset; in init_end_repeat()
721 init->offset = 0; in init_end_repeat()
730 init_copy(struct nvbios_init *init) in init_copy() argument
732 struct nvkm_bios *bios = init->bios; in init_copy()
733 u32 reg = nv_ro32(bios, init->offset + 1); in init_copy()
734 u8 shift = nv_ro08(bios, init->offset + 5); in init_copy()
735 u8 smask = nv_ro08(bios, init->offset + 6); in init_copy()
736 u16 port = nv_ro16(bios, init->offset + 7); in init_copy()
737 u8 index = nv_ro08(bios, init->offset + 9); in init_copy()
738 u8 mask = nv_ro08(bios, init->offset + 10); in init_copy()
745 init->offset += 11; in init_copy()
747 data = init_rdvgai(init, port, index) & mask; in init_copy()
748 data |= init_shift(init_rd32(init, reg), shift) & smask; in init_copy()
749 init_wrvgai(init, port, index, data); in init_copy()
757 init_not(struct nvbios_init *init) in init_not() argument
760 init->offset += 1; in init_not()
761 init_exec_inv(init); in init_not()
769 init_io_flag_condition(struct nvbios_init *init) in init_io_flag_condition() argument
771 struct nvkm_bios *bios = init->bios; in init_io_flag_condition()
772 u8 cond = nv_ro08(bios, init->offset + 1); in init_io_flag_condition()
775 init->offset += 2; in init_io_flag_condition()
777 if (!init_io_flag_condition_met(init, cond)) in init_io_flag_condition()
778 init_exec_set(init, false); in init_io_flag_condition()
786 init_dp_condition(struct nvbios_init *init) in init_dp_condition() argument
788 struct nvkm_bios *bios = init->bios; in init_dp_condition()
790 u8 cond = nv_ro08(bios, init->offset + 1); in init_dp_condition()
791 u8 unkn = nv_ro08(bios, init->offset + 2); in init_dp_condition()
796 init->offset += 3; in init_dp_condition()
800 if (init_conn(init) != DCB_CONNECTOR_eDP) in init_dp_condition()
801 init_exec_set(init, false); in init_dp_condition()
805 if ( init->outp && in init_dp_condition()
807 (init->outp->or << 0) | in init_dp_condition()
808 (init->outp->sorconf.link << 6), in init_dp_condition()
812 init_exec_set(init, false); in init_dp_condition()
816 if (init_exec(init)) in init_dp_condition()
820 if (!(init_rdauxr(init, 0x0d) & 1)) in init_dp_condition()
821 init_exec_set(init, false); in init_dp_condition()
834 init_io_mask_or(struct nvbios_init *init) in init_io_mask_or() argument
836 struct nvkm_bios *bios = init->bios; in init_io_mask_or()
837 u8 index = nv_ro08(bios, init->offset + 1); in init_io_mask_or()
838 u8 or = init_or(init); in init_io_mask_or()
842 init->offset += 2; in init_io_mask_or()
844 data = init_rdvgai(init, 0x03d4, index); in init_io_mask_or()
845 init_wrvgai(init, 0x03d4, index, data &= ~(1 << or)); in init_io_mask_or()
853 init_io_or(struct nvbios_init *init) in init_io_or() argument
855 struct nvkm_bios *bios = init->bios; in init_io_or()
856 u8 index = nv_ro08(bios, init->offset + 1); in init_io_or()
857 u8 or = init_or(init); in init_io_or()
861 init->offset += 2; in init_io_or()
863 data = init_rdvgai(init, 0x03d4, index); in init_io_or()
864 init_wrvgai(init, 0x03d4, index, data | (1 << or)); in init_io_or()
872 init_andn_reg(struct nvbios_init *init) in init_andn_reg() argument
874 struct nvkm_bios *bios = init->bios; in init_andn_reg()
875 u32 reg = nv_ro32(bios, init->offset + 1); in init_andn_reg()
876 u32 mask = nv_ro32(bios, init->offset + 5); in init_andn_reg()
879 init->offset += 9; in init_andn_reg()
881 init_mask(init, reg, mask, 0); in init_andn_reg()
889 init_or_reg(struct nvbios_init *init) in init_or_reg() argument
891 struct nvkm_bios *bios = init->bios; in init_or_reg()
892 u32 reg = nv_ro32(bios, init->offset + 1); in init_or_reg()
893 u32 mask = nv_ro32(bios, init->offset + 5); in init_or_reg()
896 init->offset += 9; in init_or_reg()
898 init_mask(init, reg, 0, mask); in init_or_reg()
906 init_idx_addr_latched(struct nvbios_init *init) in init_idx_addr_latched() argument
908 struct nvkm_bios *bios = init->bios; in init_idx_addr_latched()
909 u32 creg = nv_ro32(bios, init->offset + 1); in init_idx_addr_latched()
910 u32 dreg = nv_ro32(bios, init->offset + 5); in init_idx_addr_latched()
911 u32 mask = nv_ro32(bios, init->offset + 9); in init_idx_addr_latched()
912 u32 data = nv_ro32(bios, init->offset + 13); in init_idx_addr_latched()
913 u8 count = nv_ro08(bios, init->offset + 17); in init_idx_addr_latched()
917 init->offset += 18; in init_idx_addr_latched()
920 u8 iaddr = nv_ro08(bios, init->offset + 0); in init_idx_addr_latched()
921 u8 idata = nv_ro08(bios, init->offset + 1); in init_idx_addr_latched()
924 init->offset += 2; in init_idx_addr_latched()
926 init_wr32(init, dreg, idata); in init_idx_addr_latched()
927 init_mask(init, creg, ~mask, data | iaddr); in init_idx_addr_latched()
936 init_io_restrict_pll2(struct nvbios_init *init) in init_io_restrict_pll2() argument
938 struct nvkm_bios *bios = init->bios; in init_io_restrict_pll2()
939 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_pll2()
940 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_pll2()
941 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_pll2()
942 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_pll2()
943 u8 count = nv_ro08(bios, init->offset + 6); in init_io_restrict_pll2()
944 u32 reg = nv_ro32(bios, init->offset + 7); in init_io_restrict_pll2()
950 init->offset += 11; in init_io_restrict_pll2()
952 conf = (init_rdvgai(init, port, index) & mask) >> shift; in init_io_restrict_pll2()
954 u32 freq = nv_ro32(bios, init->offset); in init_io_restrict_pll2()
957 init_prog_pll(init, reg, freq); in init_io_restrict_pll2()
961 init->offset += 4; in init_io_restrict_pll2()
971 init_pll2(struct nvbios_init *init) in init_pll2() argument
973 struct nvkm_bios *bios = init->bios; in init_pll2()
974 u32 reg = nv_ro32(bios, init->offset + 1); in init_pll2()
975 u32 freq = nv_ro32(bios, init->offset + 5); in init_pll2()
978 init->offset += 9; in init_pll2()
980 init_prog_pll(init, reg, freq); in init_pll2()
988 init_i2c_byte(struct nvbios_init *init) in init_i2c_byte() argument
990 struct nvkm_bios *bios = init->bios; in init_i2c_byte()
991 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_byte()
992 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_i2c_byte()
993 u8 count = nv_ro08(bios, init->offset + 3); in init_i2c_byte()
996 init->offset += 4; in init_i2c_byte()
999 u8 reg = nv_ro08(bios, init->offset + 0); in init_i2c_byte()
1000 u8 mask = nv_ro08(bios, init->offset + 1); in init_i2c_byte()
1001 u8 data = nv_ro08(bios, init->offset + 2); in init_i2c_byte()
1005 init->offset += 3; in init_i2c_byte()
1007 val = init_rdi2cr(init, index, addr, reg); in init_i2c_byte()
1010 init_wri2cr(init, index, addr, reg, (val & mask) | data); in init_i2c_byte()
1019 init_zm_i2c_byte(struct nvbios_init *init) in init_zm_i2c_byte() argument
1021 struct nvkm_bios *bios = init->bios; in init_zm_i2c_byte()
1022 u8 index = nv_ro08(bios, init->offset + 1); in init_zm_i2c_byte()
1023 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1024 u8 count = nv_ro08(bios, init->offset + 3); in init_zm_i2c_byte()
1027 init->offset += 4; in init_zm_i2c_byte()
1030 u8 reg = nv_ro08(bios, init->offset + 0); in init_zm_i2c_byte()
1031 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_i2c_byte()
1034 init->offset += 2; in init_zm_i2c_byte()
1036 init_wri2cr(init, index, addr, reg, data); in init_zm_i2c_byte()
1045 init_zm_i2c(struct nvbios_init *init) in init_zm_i2c() argument
1047 struct nvkm_bios *bios = init->bios; in init_zm_i2c()
1048 u8 index = nv_ro08(bios, init->offset + 1); in init_zm_i2c()
1049 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1050 u8 count = nv_ro08(bios, init->offset + 3); in init_zm_i2c()
1054 init->offset += 4; in init_zm_i2c()
1057 data[i] = nv_ro08(bios, init->offset); in init_zm_i2c()
1059 init->offset++; in init_zm_i2c()
1062 if (init_exec(init)) { in init_zm_i2c()
1063 struct nvkm_i2c_port *port = init_i2c(init, index); in init_zm_i2c()
1079 init_tmds(struct nvbios_init *init) in init_tmds() argument
1081 struct nvkm_bios *bios = init->bios; in init_tmds()
1082 u8 tmds = nv_ro08(bios, init->offset + 1); in init_tmds()
1083 u8 addr = nv_ro08(bios, init->offset + 2); in init_tmds()
1084 u8 mask = nv_ro08(bios, init->offset + 3); in init_tmds()
1085 u8 data = nv_ro08(bios, init->offset + 4); in init_tmds()
1086 u32 reg = init_tmds_reg(init, tmds); in init_tmds()
1090 init->offset += 5; in init_tmds()
1095 init_wr32(init, reg + 0, addr | 0x00010000); in init_tmds()
1096 init_wr32(init, reg + 4, data | (init_rd32(init, reg + 4) & mask)); in init_tmds()
1097 init_wr32(init, reg + 0, addr); in init_tmds()
1105 init_zm_tmds_group(struct nvbios_init *init) in init_zm_tmds_group() argument
1107 struct nvkm_bios *bios = init->bios; in init_zm_tmds_group()
1108 u8 tmds = nv_ro08(bios, init->offset + 1); in init_zm_tmds_group()
1109 u8 count = nv_ro08(bios, init->offset + 2); in init_zm_tmds_group()
1110 u32 reg = init_tmds_reg(init, tmds); in init_zm_tmds_group()
1113 init->offset += 3; in init_zm_tmds_group()
1116 u8 addr = nv_ro08(bios, init->offset + 0); in init_zm_tmds_group()
1117 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_tmds_group()
1120 init->offset += 2; in init_zm_tmds_group()
1122 init_wr32(init, reg + 4, data); in init_zm_tmds_group()
1123 init_wr32(init, reg + 0, addr); in init_zm_tmds_group()
1132 init_cr_idx_adr_latch(struct nvbios_init *init) in init_cr_idx_adr_latch() argument
1134 struct nvkm_bios *bios = init->bios; in init_cr_idx_adr_latch()
1135 u8 addr0 = nv_ro08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1136 u8 addr1 = nv_ro08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1137 u8 base = nv_ro08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1138 u8 count = nv_ro08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1142 init->offset += 5; in init_cr_idx_adr_latch()
1144 save0 = init_rdvgai(init, 0x03d4, addr0); in init_cr_idx_adr_latch()
1146 u8 data = nv_ro08(bios, init->offset); in init_cr_idx_adr_latch()
1149 init->offset += 1; in init_cr_idx_adr_latch()
1151 init_wrvgai(init, 0x03d4, addr0, base++); in init_cr_idx_adr_latch()
1152 init_wrvgai(init, 0x03d4, addr1, data); in init_cr_idx_adr_latch()
1154 init_wrvgai(init, 0x03d4, addr0, save0); in init_cr_idx_adr_latch()
1162 init_cr(struct nvbios_init *init) in init_cr() argument
1164 struct nvkm_bios *bios = init->bios; in init_cr()
1165 u8 addr = nv_ro08(bios, init->offset + 1); in init_cr()
1166 u8 mask = nv_ro08(bios, init->offset + 2); in init_cr()
1167 u8 data = nv_ro08(bios, init->offset + 3); in init_cr()
1171 init->offset += 4; in init_cr()
1173 val = init_rdvgai(init, 0x03d4, addr) & mask; in init_cr()
1174 init_wrvgai(init, 0x03d4, addr, val | data); in init_cr()
1182 init_zm_cr(struct nvbios_init *init) in init_zm_cr() argument
1184 struct nvkm_bios *bios = init->bios; in init_zm_cr()
1185 u8 addr = nv_ro08(bios, init->offset + 1); in init_zm_cr()
1186 u8 data = nv_ro08(bios, init->offset + 2); in init_zm_cr()
1189 init->offset += 3; in init_zm_cr()
1191 init_wrvgai(init, 0x03d4, addr, data); in init_zm_cr()
1199 init_zm_cr_group(struct nvbios_init *init) in init_zm_cr_group() argument
1201 struct nvkm_bios *bios = init->bios; in init_zm_cr_group()
1202 u8 count = nv_ro08(bios, init->offset + 1); in init_zm_cr_group()
1205 init->offset += 2; in init_zm_cr_group()
1208 u8 addr = nv_ro08(bios, init->offset + 0); in init_zm_cr_group()
1209 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_cr_group()
1212 init->offset += 2; in init_zm_cr_group()
1214 init_wrvgai(init, 0x03d4, addr, data); in init_zm_cr_group()
1223 init_condition_time(struct nvbios_init *init) in init_condition_time() argument
1225 struct nvkm_bios *bios = init->bios; in init_condition_time()
1226 u8 cond = nv_ro08(bios, init->offset + 1); in init_condition_time()
1227 u8 retry = nv_ro08(bios, init->offset + 2); in init_condition_time()
1231 init->offset += 3; in init_condition_time()
1233 if (!init_exec(init)) in init_condition_time()
1237 if (init_condition_met(init, cond)) in init_condition_time()
1242 init_exec_set(init, false); in init_condition_time()
1250 init_ltime(struct nvbios_init *init) in init_ltime() argument
1252 struct nvkm_bios *bios = init->bios; in init_ltime()
1253 u16 msec = nv_ro16(bios, init->offset + 1); in init_ltime()
1256 init->offset += 3; in init_ltime()
1258 if (init_exec(init)) in init_ltime()
1267 init_zm_reg_sequence(struct nvbios_init *init) in init_zm_reg_sequence() argument
1269 struct nvkm_bios *bios = init->bios; in init_zm_reg_sequence()
1270 u32 base = nv_ro32(bios, init->offset + 1); in init_zm_reg_sequence()
1271 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_reg_sequence()
1274 init->offset += 6; in init_zm_reg_sequence()
1277 u32 data = nv_ro32(bios, init->offset); in init_zm_reg_sequence()
1280 init->offset += 4; in init_zm_reg_sequence()
1282 init_wr32(init, base, data); in init_zm_reg_sequence()
1292 init_sub_direct(struct nvbios_init *init) in init_sub_direct() argument
1294 struct nvkm_bios *bios = init->bios; in init_sub_direct()
1295 u16 addr = nv_ro16(bios, init->offset + 1); in init_sub_direct()
1300 if (init_exec(init)) { in init_sub_direct()
1301 save = init->offset; in init_sub_direct()
1302 init->offset = addr; in init_sub_direct()
1303 if (nvbios_exec(init)) { in init_sub_direct()
1307 init->offset = save; in init_sub_direct()
1310 init->offset += 3; in init_sub_direct()
1318 init_jump(struct nvbios_init *init) in init_jump() argument
1320 struct nvkm_bios *bios = init->bios; in init_jump()
1321 u16 offset = nv_ro16(bios, init->offset + 1); in init_jump()
1325 if (init_exec(init)) in init_jump()
1326 init->offset = offset; in init_jump()
1328 init->offset += 3; in init_jump()
1336 init_i2c_if(struct nvbios_init *init) in init_i2c_if() argument
1338 struct nvkm_bios *bios = init->bios; in init_i2c_if()
1339 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_if()
1340 u8 addr = nv_ro08(bios, init->offset + 2); in init_i2c_if()
1341 u8 reg = nv_ro08(bios, init->offset + 3); in init_i2c_if()
1342 u8 mask = nv_ro08(bios, init->offset + 4); in init_i2c_if()
1343 u8 data = nv_ro08(bios, init->offset + 5); in init_i2c_if()
1348 init->offset += 6; in init_i2c_if()
1349 init_exec_force(init, true); in init_i2c_if()
1351 value = init_rdi2cr(init, index, addr, reg); in init_i2c_if()
1353 init_exec_set(init, false); in init_i2c_if()
1355 init_exec_force(init, false); in init_i2c_if()
1363 init_copy_nv_reg(struct nvbios_init *init) in init_copy_nv_reg() argument
1365 struct nvkm_bios *bios = init->bios; in init_copy_nv_reg()
1366 u32 sreg = nv_ro32(bios, init->offset + 1); in init_copy_nv_reg()
1367 u8 shift = nv_ro08(bios, init->offset + 5); in init_copy_nv_reg()
1368 u32 smask = nv_ro32(bios, init->offset + 6); in init_copy_nv_reg()
1369 u32 sxor = nv_ro32(bios, init->offset + 10); in init_copy_nv_reg()
1370 u32 dreg = nv_ro32(bios, init->offset + 14); in init_copy_nv_reg()
1371 u32 dmask = nv_ro32(bios, init->offset + 18); in init_copy_nv_reg()
1378 init->offset += 22; in init_copy_nv_reg()
1380 data = init_shift(init_rd32(init, sreg), shift); in init_copy_nv_reg()
1381 init_mask(init, dreg, ~dmask, (data & smask) ^ sxor); in init_copy_nv_reg()
1389 init_zm_index_io(struct nvbios_init *init) in init_zm_index_io() argument
1391 struct nvkm_bios *bios = init->bios; in init_zm_index_io()
1392 u16 port = nv_ro16(bios, init->offset + 1); in init_zm_index_io()
1393 u8 index = nv_ro08(bios, init->offset + 3); in init_zm_index_io()
1394 u8 data = nv_ro08(bios, init->offset + 4); in init_zm_index_io()
1397 init->offset += 5; in init_zm_index_io()
1399 init_wrvgai(init, port, index, data); in init_zm_index_io()
1407 init_compute_mem(struct nvbios_init *init) in init_compute_mem() argument
1409 struct nvkm_devinit *devinit = nvkm_devinit(init->bios); in init_compute_mem()
1412 init->offset += 1; in init_compute_mem()
1414 init_exec_force(init, true); in init_compute_mem()
1415 if (init_exec(init) && devinit->meminit) in init_compute_mem()
1417 init_exec_force(init, false); in init_compute_mem()
1425 init_reset(struct nvbios_init *init) in init_reset() argument
1427 struct nvkm_bios *bios = init->bios; in init_reset()
1428 u32 reg = nv_ro32(bios, init->offset + 1); in init_reset()
1429 u32 data1 = nv_ro32(bios, init->offset + 5); in init_reset()
1430 u32 data2 = nv_ro32(bios, init->offset + 9); in init_reset()
1434 init->offset += 13; in init_reset()
1435 init_exec_force(init, true); in init_reset()
1437 savepci19 = init_mask(init, 0x00184c, 0x00000f00, 0x00000000); in init_reset()
1438 init_wr32(init, reg, data1); in init_reset()
1440 init_wr32(init, reg, data2); in init_reset()
1441 init_wr32(init, 0x00184c, savepci19); in init_reset()
1442 init_mask(init, 0x001850, 0x00000001, 0x00000000); in init_reset()
1444 init_exec_force(init, false); in init_reset()
1452 init_configure_mem_clk(struct nvbios_init *init) in init_configure_mem_clk() argument
1454 u16 mdata = bmp_mem_init_table(init->bios); in init_configure_mem_clk()
1456 mdata += (init_rdvgai(init, 0x03d4, 0x3c) >> 4) * 66; in init_configure_mem_clk()
1461 init_configure_mem(struct nvbios_init *init) in init_configure_mem() argument
1463 struct nvkm_bios *bios = init->bios; in init_configure_mem()
1468 init->offset += 1; in init_configure_mem()
1471 init_done(init); in init_configure_mem()
1474 init_exec_force(init, true); in init_configure_mem()
1476 mdata = init_configure_mem_clk(init); in init_configure_mem()
1482 data = init_rdvgai(init, 0x03c4, 0x01); in init_configure_mem()
1483 init_wrvgai(init, 0x03c4, 0x01, data | 0x20); in init_configure_mem()
1500 init_wr32(init, addr, data); in init_configure_mem()
1503 init_exec_force(init, false); in init_configure_mem()
1511 init_configure_clk(struct nvbios_init *init) in init_configure_clk() argument
1513 struct nvkm_bios *bios = init->bios; in init_configure_clk()
1517 init->offset += 1; in init_configure_clk()
1520 init_done(init); in init_configure_clk()
1523 init_exec_force(init, true); in init_configure_clk()
1525 mdata = init_configure_mem_clk(init); in init_configure_clk()
1529 init_prog_pll(init, 0x680500, clock); in init_configure_clk()
1535 init_prog_pll(init, 0x680504, clock); in init_configure_clk()
1537 init_exec_force(init, false); in init_configure_clk()
1545 init_configure_preinit(struct nvbios_init *init) in init_configure_preinit() argument
1547 struct nvkm_bios *bios = init->bios; in init_configure_preinit()
1551 init->offset += 1; in init_configure_preinit()
1554 init_done(init); in init_configure_preinit()
1557 init_exec_force(init, true); in init_configure_preinit()
1559 strap = init_rd32(init, 0x101000); in init_configure_preinit()
1561 init_wrvgai(init, 0x03d4, 0x3c, strap); in init_configure_preinit()
1563 init_exec_force(init, false); in init_configure_preinit()
1571 init_io(struct nvbios_init *init) in init_io() argument
1573 struct nvkm_bios *bios = init->bios; in init_io()
1574 u16 port = nv_ro16(bios, init->offset + 1); in init_io()
1575 u8 mask = nv_ro16(bios, init->offset + 3); in init_io()
1576 u8 data = nv_ro16(bios, init->offset + 4); in init_io()
1580 init->offset += 5; in init_io()
1586 if (nv_device(init->bios)->card_type >= NV_50 && in init_io()
1588 init_mask(init, 0x614100, 0xf0800000, 0x00800000); in init_io()
1589 init_mask(init, 0x00e18c, 0x00020000, 0x00020000); in init_io()
1590 init_mask(init, 0x614900, 0xf0800000, 0x00800000); in init_io()
1591 init_mask(init, 0x000200, 0x40000000, 0x00000000); in init_io()
1593 init_mask(init, 0x00e18c, 0x00020000, 0x00000000); in init_io()
1594 init_mask(init, 0x000200, 0x40000000, 0x40000000); in init_io()
1595 init_wr32(init, 0x614100, 0x00800018); in init_io()
1596 init_wr32(init, 0x614900, 0x00800018); in init_io()
1598 init_wr32(init, 0x614100, 0x10000018); in init_io()
1599 init_wr32(init, 0x614900, 0x10000018); in init_io()
1602 value = init_rdport(init, port) & mask; in init_io()
1603 init_wrport(init, port, data | value); in init_io()
1611 init_sub(struct nvbios_init *init) in init_sub() argument
1613 struct nvkm_bios *bios = init->bios; in init_sub()
1614 u8 index = nv_ro08(bios, init->offset + 1); in init_sub()
1620 if (addr && init_exec(init)) { in init_sub()
1621 save = init->offset; in init_sub()
1622 init->offset = addr; in init_sub()
1623 if (nvbios_exec(init)) { in init_sub()
1627 init->offset = save; in init_sub()
1630 init->offset += 2; in init_sub()
1638 init_ram_condition(struct nvbios_init *init) in init_ram_condition() argument
1640 struct nvkm_bios *bios = init->bios; in init_ram_condition()
1641 u8 mask = nv_ro08(bios, init->offset + 1); in init_ram_condition()
1642 u8 value = nv_ro08(bios, init->offset + 2); in init_ram_condition()
1646 init->offset += 3; in init_ram_condition()
1648 if ((init_rd32(init, 0x100000) & mask) != value) in init_ram_condition()
1649 init_exec_set(init, false); in init_ram_condition()
1657 init_nv_reg(struct nvbios_init *init) in init_nv_reg() argument
1659 struct nvkm_bios *bios = init->bios; in init_nv_reg()
1660 u32 reg = nv_ro32(bios, init->offset + 1); in init_nv_reg()
1661 u32 mask = nv_ro32(bios, init->offset + 5); in init_nv_reg()
1662 u32 data = nv_ro32(bios, init->offset + 9); in init_nv_reg()
1665 init->offset += 13; in init_nv_reg()
1667 init_mask(init, reg, ~mask, data); in init_nv_reg()
1675 init_macro(struct nvbios_init *init) in init_macro() argument
1677 struct nvkm_bios *bios = init->bios; in init_macro()
1678 u8 macro = nv_ro08(bios, init->offset + 1); in init_macro()
1683 table = init_macro_table(init); in init_macro()
1688 init_wr32(init, addr, data); in init_macro()
1691 init->offset += 2; in init_macro()
1699 init_resume(struct nvbios_init *init) in init_resume() argument
1702 init->offset += 1; in init_resume()
1703 init_exec_set(init, true); in init_resume()
1711 init_time(struct nvbios_init *init) in init_time() argument
1713 struct nvkm_bios *bios = init->bios; in init_time()
1714 u16 usec = nv_ro16(bios, init->offset + 1); in init_time()
1717 init->offset += 3; in init_time()
1719 if (init_exec(init)) { in init_time()
1732 init_condition(struct nvbios_init *init) in init_condition() argument
1734 struct nvkm_bios *bios = init->bios; in init_condition()
1735 u8 cond = nv_ro08(bios, init->offset + 1); in init_condition()
1738 init->offset += 2; in init_condition()
1740 if (!init_condition_met(init, cond)) in init_condition()
1741 init_exec_set(init, false); in init_condition()
1749 init_io_condition(struct nvbios_init *init) in init_io_condition() argument
1751 struct nvkm_bios *bios = init->bios; in init_io_condition()
1752 u8 cond = nv_ro08(bios, init->offset + 1); in init_io_condition()
1755 init->offset += 2; in init_io_condition()
1757 if (!init_io_condition_met(init, cond)) in init_io_condition()
1758 init_exec_set(init, false); in init_io_condition()
1766 init_index_io(struct nvbios_init *init) in init_index_io() argument
1768 struct nvkm_bios *bios = init->bios; in init_index_io()
1769 u16 port = nv_ro16(bios, init->offset + 1); in init_index_io()
1770 u8 index = nv_ro16(bios, init->offset + 3); in init_index_io()
1771 u8 mask = nv_ro08(bios, init->offset + 4); in init_index_io()
1772 u8 data = nv_ro08(bios, init->offset + 5); in init_index_io()
1777 init->offset += 6; in init_index_io()
1779 value = init_rdvgai(init, port, index) & mask; in init_index_io()
1780 init_wrvgai(init, port, index, data | value); in init_index_io()
1788 init_pll(struct nvbios_init *init) in init_pll() argument
1790 struct nvkm_bios *bios = init->bios; in init_pll()
1791 u32 reg = nv_ro32(bios, init->offset + 1); in init_pll()
1792 u32 freq = nv_ro16(bios, init->offset + 5) * 10; in init_pll()
1795 init->offset += 7; in init_pll()
1797 init_prog_pll(init, reg, freq); in init_pll()
1805 init_zm_reg(struct nvbios_init *init) in init_zm_reg() argument
1807 struct nvkm_bios *bios = init->bios; in init_zm_reg()
1808 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_reg()
1809 u32 data = nv_ro32(bios, init->offset + 5); in init_zm_reg()
1812 init->offset += 9; in init_zm_reg()
1817 init_wr32(init, addr, data); in init_zm_reg()
1825 init_ram_restrict_pll(struct nvbios_init *init) in init_ram_restrict_pll() argument
1827 struct nvkm_bios *bios = init->bios; in init_ram_restrict_pll()
1828 u8 type = nv_ro08(bios, init->offset + 1); in init_ram_restrict_pll()
1829 u8 count = init_ram_restrict_group_count(init); in init_ram_restrict_pll()
1830 u8 strap = init_ram_restrict(init); in init_ram_restrict_pll()
1834 init->offset += 2; in init_ram_restrict_pll()
1837 u32 freq = nv_ro32(bios, init->offset); in init_ram_restrict_pll()
1841 init_prog_pll(init, type, freq); in init_ram_restrict_pll()
1846 init->offset += 4; in init_ram_restrict_pll()
1855 init_gpio(struct nvbios_init *init) in init_gpio() argument
1857 struct nvkm_gpio *gpio = nvkm_gpio(init->bios); in init_gpio()
1860 init->offset += 1; in init_gpio()
1862 if (init_exec(init) && gpio && gpio->reset) in init_gpio()
1871 init_ram_restrict_zm_reg_group(struct nvbios_init *init) in init_ram_restrict_zm_reg_group() argument
1873 struct nvkm_bios *bios = init->bios; in init_ram_restrict_zm_reg_group()
1874 u32 addr = nv_ro32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1875 u8 incr = nv_ro08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1876 u8 num = nv_ro08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1877 u8 count = init_ram_restrict_group_count(init); in init_ram_restrict_zm_reg_group()
1878 u8 index = init_ram_restrict(init); in init_ram_restrict_zm_reg_group()
1883 init->offset += 7; in init_ram_restrict_zm_reg_group()
1888 u32 data = nv_ro32(bios, init->offset); in init_ram_restrict_zm_reg_group()
1892 init_wr32(init, addr, data); in init_ram_restrict_zm_reg_group()
1897 init->offset += 4; in init_ram_restrict_zm_reg_group()
1909 init_copy_zm_reg(struct nvbios_init *init) in init_copy_zm_reg() argument
1911 struct nvkm_bios *bios = init->bios; in init_copy_zm_reg()
1912 u32 sreg = nv_ro32(bios, init->offset + 1); in init_copy_zm_reg()
1913 u32 dreg = nv_ro32(bios, init->offset + 5); in init_copy_zm_reg()
1916 init->offset += 9; in init_copy_zm_reg()
1918 init_wr32(init, dreg, init_rd32(init, sreg)); in init_copy_zm_reg()
1926 init_zm_reg_group(struct nvbios_init *init) in init_zm_reg_group() argument
1928 struct nvkm_bios *bios = init->bios; in init_zm_reg_group()
1929 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_reg_group()
1930 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_reg_group()
1933 init->offset += 6; in init_zm_reg_group()
1936 u32 data = nv_ro32(bios, init->offset); in init_zm_reg_group()
1938 init_wr32(init, addr, data); in init_zm_reg_group()
1939 init->offset += 4; in init_zm_reg_group()
1948 init_xlat(struct nvbios_init *init) in init_xlat() argument
1950 struct nvkm_bios *bios = init->bios; in init_xlat()
1951 u32 saddr = nv_ro32(bios, init->offset + 1); in init_xlat()
1952 u8 sshift = nv_ro08(bios, init->offset + 5); in init_xlat()
1953 u8 smask = nv_ro08(bios, init->offset + 6); in init_xlat()
1954 u8 index = nv_ro08(bios, init->offset + 7); in init_xlat()
1955 u32 daddr = nv_ro32(bios, init->offset + 8); in init_xlat()
1956 u32 dmask = nv_ro32(bios, init->offset + 12); in init_xlat()
1957 u8 shift = nv_ro08(bios, init->offset + 16); in init_xlat()
1964 init->offset += 17; in init_xlat()
1966 data = init_shift(init_rd32(init, saddr), sshift) & smask; in init_xlat()
1967 data = init_xlat_(init, index, data) << shift; in init_xlat()
1968 init_mask(init, daddr, ~dmask, data); in init_xlat()
1976 init_zm_mask_add(struct nvbios_init *init) in init_zm_mask_add() argument
1978 struct nvkm_bios *bios = init->bios; in init_zm_mask_add()
1979 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_mask_add()
1980 u32 mask = nv_ro32(bios, init->offset + 5); in init_zm_mask_add()
1981 u32 add = nv_ro32(bios, init->offset + 9); in init_zm_mask_add()
1985 init->offset += 13; in init_zm_mask_add()
1987 data = init_rd32(init, addr); in init_zm_mask_add()
1989 init_wr32(init, addr, data); in init_zm_mask_add()
1997 init_auxch(struct nvbios_init *init) in init_auxch() argument
1999 struct nvkm_bios *bios = init->bios; in init_auxch()
2000 u32 addr = nv_ro32(bios, init->offset + 1); in init_auxch()
2001 u8 count = nv_ro08(bios, init->offset + 5); in init_auxch()
2004 init->offset += 6; in init_auxch()
2007 u8 mask = nv_ro08(bios, init->offset + 0); in init_auxch()
2008 u8 data = nv_ro08(bios, init->offset + 1); in init_auxch()
2010 mask = init_rdauxr(init, addr) & mask; in init_auxch()
2011 init_wrauxr(init, addr, mask | data); in init_auxch()
2012 init->offset += 2; in init_auxch()
2021 init_zm_auxch(struct nvbios_init *init) in init_zm_auxch() argument
2023 struct nvkm_bios *bios = init->bios; in init_zm_auxch()
2024 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_auxch()
2025 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_auxch()
2028 init->offset += 6; in init_zm_auxch()
2031 u8 data = nv_ro08(bios, init->offset + 0); in init_zm_auxch()
2033 init_wrauxr(init, addr, data); in init_zm_auxch()
2034 init->offset += 1; in init_zm_auxch()
2043 init_i2c_long_if(struct nvbios_init *init) in init_i2c_long_if() argument
2045 struct nvkm_bios *bios = init->bios; in init_i2c_long_if()
2046 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_long_if()
2047 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2048 u8 reglo = nv_ro08(bios, init->offset + 3); in init_i2c_long_if()
2049 u8 reghi = nv_ro08(bios, init->offset + 4); in init_i2c_long_if()
2050 u8 mask = nv_ro08(bios, init->offset + 5); in init_i2c_long_if()
2051 u8 data = nv_ro08(bios, init->offset + 6); in init_i2c_long_if()
2057 init->offset += 7; in init_i2c_long_if()
2059 port = init_i2c(init, index); in init_i2c_long_if()
2074 init_exec_set(init, false); in init_i2c_long_if()
2082 init_gpio_ne(struct nvbios_init *init) in init_gpio_ne() argument
2084 struct nvkm_bios *bios = init->bios; in init_gpio_ne()
2087 u8 count = nv_ro08(bios, init->offset + 1); in init_gpio_ne()
2092 init->offset += 2; in init_gpio_ne()
2094 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2100 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2106 if (i == (init->offset + count)) { in init_gpio_ne()
2108 if (init_exec(init) && gpio && gpio->reset) in init_gpio_ne()
2115 init->offset += count; in init_gpio_ne()
2191 nvbios_exec(struct nvbios_init *init) in nvbios_exec() argument
2193 init->nested++; in nvbios_exec()
2194 while (init->offset) { in nvbios_exec()
2195 u8 opcode = nv_ro08(init->bios, init->offset); in nvbios_exec()
2201 init_opcode[opcode].exec(init); in nvbios_exec()
2203 init->nested--; in nvbios_exec()
2218 struct nvbios_init init = { in nvbios_init() local
2227 ret = nvbios_exec(&init); in nvbios_init()
2234 struct nvbios_init init = { in nvbios_init() local
2243 ret = nvbios_exec(&init); in nvbios_init()