Lines Matching refs:offset
41 nv_printk(init->bios, lvl, "0x%04x[%c]: "fmt, init->offset, \
356 return bit_I.offset; in init_table()
368 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
373 if (len >= offset + 2) { in init_table_()
374 data = nv_ro16(bios, data + offset); in init_table_()
452 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
459 return nv_ro08(bios, data + offset); in init_xlat_()
576 u8 opcode = nv_ro08(init->bios, init->offset); in init_reserved()
590 cont(" 0x%02x", nv_ro08(init->bios, init->offset + i)); in init_reserved()
592 init->offset += length; in init_reserved()
603 init->offset = 0x0000; in init_done()
614 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_prog()
615 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_prog()
616 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_prog()
617 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_prog()
618 u8 count = nv_ro08(bios, init->offset + 6); in init_io_restrict_prog()
619 u32 reg = nv_ro32(bios, init->offset + 7); in init_io_restrict_prog()
625 init->offset += 11; in init_io_restrict_prog()
629 u32 data = nv_ro32(bios, init->offset); in init_io_restrict_prog()
638 init->offset += 4; in init_io_restrict_prog()
651 u8 count = nv_ro08(bios, init->offset + 1); in init_repeat()
655 init->offset += 2; in init_repeat()
657 init->repeat = init->offset; in init_repeat()
658 init->repend = init->offset; in init_repeat()
660 init->offset = init->repeat; in init_repeat()
665 init->offset = init->repend; in init_repeat()
677 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_pll()
678 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_pll()
679 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_pll()
680 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_pll()
681 s8 iofc = nv_ro08(bios, init->offset + 6); in init_io_restrict_pll()
682 u8 count = nv_ro08(bios, init->offset + 7); in init_io_restrict_pll()
683 u32 reg = nv_ro32(bios, init->offset + 8); in init_io_restrict_pll()
689 init->offset += 12; in init_io_restrict_pll()
693 u32 freq = nv_ro16(bios, init->offset) * 10; in init_io_restrict_pll()
704 init->offset += 2; in init_io_restrict_pll()
717 init->offset += 1; in init_end_repeat()
720 init->repend = init->offset; in init_end_repeat()
721 init->offset = 0; in init_end_repeat()
733 u32 reg = nv_ro32(bios, init->offset + 1); in init_copy()
734 u8 shift = nv_ro08(bios, init->offset + 5); in init_copy()
735 u8 smask = nv_ro08(bios, init->offset + 6); in init_copy()
736 u16 port = nv_ro16(bios, init->offset + 7); in init_copy()
737 u8 index = nv_ro08(bios, init->offset + 9); in init_copy()
738 u8 mask = nv_ro08(bios, init->offset + 10); in init_copy()
745 init->offset += 11; in init_copy()
760 init->offset += 1; in init_not()
772 u8 cond = nv_ro08(bios, init->offset + 1); in init_io_flag_condition()
775 init->offset += 2; in init_io_flag_condition()
790 u8 cond = nv_ro08(bios, init->offset + 1); in init_dp_condition()
791 u8 unkn = nv_ro08(bios, init->offset + 2); in init_dp_condition()
796 init->offset += 3; in init_dp_condition()
837 u8 index = nv_ro08(bios, init->offset + 1); in init_io_mask_or()
842 init->offset += 2; in init_io_mask_or()
856 u8 index = nv_ro08(bios, init->offset + 1); in init_io_or()
861 init->offset += 2; in init_io_or()
875 u32 reg = nv_ro32(bios, init->offset + 1); in init_andn_reg()
876 u32 mask = nv_ro32(bios, init->offset + 5); in init_andn_reg()
879 init->offset += 9; in init_andn_reg()
892 u32 reg = nv_ro32(bios, init->offset + 1); in init_or_reg()
893 u32 mask = nv_ro32(bios, init->offset + 5); in init_or_reg()
896 init->offset += 9; in init_or_reg()
909 u32 creg = nv_ro32(bios, init->offset + 1); in init_idx_addr_latched()
910 u32 dreg = nv_ro32(bios, init->offset + 5); in init_idx_addr_latched()
911 u32 mask = nv_ro32(bios, init->offset + 9); in init_idx_addr_latched()
912 u32 data = nv_ro32(bios, init->offset + 13); in init_idx_addr_latched()
913 u8 count = nv_ro08(bios, init->offset + 17); in init_idx_addr_latched()
917 init->offset += 18; in init_idx_addr_latched()
920 u8 iaddr = nv_ro08(bios, init->offset + 0); in init_idx_addr_latched()
921 u8 idata = nv_ro08(bios, init->offset + 1); in init_idx_addr_latched()
924 init->offset += 2; in init_idx_addr_latched()
939 u16 port = nv_ro16(bios, init->offset + 1); in init_io_restrict_pll2()
940 u8 index = nv_ro08(bios, init->offset + 3); in init_io_restrict_pll2()
941 u8 mask = nv_ro08(bios, init->offset + 4); in init_io_restrict_pll2()
942 u8 shift = nv_ro08(bios, init->offset + 5); in init_io_restrict_pll2()
943 u8 count = nv_ro08(bios, init->offset + 6); in init_io_restrict_pll2()
944 u32 reg = nv_ro32(bios, init->offset + 7); in init_io_restrict_pll2()
950 init->offset += 11; in init_io_restrict_pll2()
954 u32 freq = nv_ro32(bios, init->offset); in init_io_restrict_pll2()
961 init->offset += 4; in init_io_restrict_pll2()
974 u32 reg = nv_ro32(bios, init->offset + 1); in init_pll2()
975 u32 freq = nv_ro32(bios, init->offset + 5); in init_pll2()
978 init->offset += 9; in init_pll2()
991 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_byte()
992 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_i2c_byte()
993 u8 count = nv_ro08(bios, init->offset + 3); in init_i2c_byte()
996 init->offset += 4; in init_i2c_byte()
999 u8 reg = nv_ro08(bios, init->offset + 0); in init_i2c_byte()
1000 u8 mask = nv_ro08(bios, init->offset + 1); in init_i2c_byte()
1001 u8 data = nv_ro08(bios, init->offset + 2); in init_i2c_byte()
1005 init->offset += 3; in init_i2c_byte()
1022 u8 index = nv_ro08(bios, init->offset + 1); in init_zm_i2c_byte()
1023 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1024 u8 count = nv_ro08(bios, init->offset + 3); in init_zm_i2c_byte()
1027 init->offset += 4; in init_zm_i2c_byte()
1030 u8 reg = nv_ro08(bios, init->offset + 0); in init_zm_i2c_byte()
1031 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_i2c_byte()
1034 init->offset += 2; in init_zm_i2c_byte()
1048 u8 index = nv_ro08(bios, init->offset + 1); in init_zm_i2c()
1049 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1050 u8 count = nv_ro08(bios, init->offset + 3); in init_zm_i2c()
1054 init->offset += 4; in init_zm_i2c()
1057 data[i] = nv_ro08(bios, init->offset); in init_zm_i2c()
1059 init->offset++; in init_zm_i2c()
1082 u8 tmds = nv_ro08(bios, init->offset + 1); in init_tmds()
1083 u8 addr = nv_ro08(bios, init->offset + 2); in init_tmds()
1084 u8 mask = nv_ro08(bios, init->offset + 3); in init_tmds()
1085 u8 data = nv_ro08(bios, init->offset + 4); in init_tmds()
1090 init->offset += 5; in init_tmds()
1108 u8 tmds = nv_ro08(bios, init->offset + 1); in init_zm_tmds_group()
1109 u8 count = nv_ro08(bios, init->offset + 2); in init_zm_tmds_group()
1113 init->offset += 3; in init_zm_tmds_group()
1116 u8 addr = nv_ro08(bios, init->offset + 0); in init_zm_tmds_group()
1117 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_tmds_group()
1120 init->offset += 2; in init_zm_tmds_group()
1135 u8 addr0 = nv_ro08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1136 u8 addr1 = nv_ro08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1137 u8 base = nv_ro08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1138 u8 count = nv_ro08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1142 init->offset += 5; in init_cr_idx_adr_latch()
1146 u8 data = nv_ro08(bios, init->offset); in init_cr_idx_adr_latch()
1149 init->offset += 1; in init_cr_idx_adr_latch()
1165 u8 addr = nv_ro08(bios, init->offset + 1); in init_cr()
1166 u8 mask = nv_ro08(bios, init->offset + 2); in init_cr()
1167 u8 data = nv_ro08(bios, init->offset + 3); in init_cr()
1171 init->offset += 4; in init_cr()
1185 u8 addr = nv_ro08(bios, init->offset + 1); in init_zm_cr()
1186 u8 data = nv_ro08(bios, init->offset + 2); in init_zm_cr()
1189 init->offset += 3; in init_zm_cr()
1202 u8 count = nv_ro08(bios, init->offset + 1); in init_zm_cr_group()
1205 init->offset += 2; in init_zm_cr_group()
1208 u8 addr = nv_ro08(bios, init->offset + 0); in init_zm_cr_group()
1209 u8 data = nv_ro08(bios, init->offset + 1); in init_zm_cr_group()
1212 init->offset += 2; in init_zm_cr_group()
1226 u8 cond = nv_ro08(bios, init->offset + 1); in init_condition_time()
1227 u8 retry = nv_ro08(bios, init->offset + 2); in init_condition_time()
1231 init->offset += 3; in init_condition_time()
1253 u16 msec = nv_ro16(bios, init->offset + 1); in init_ltime()
1256 init->offset += 3; in init_ltime()
1270 u32 base = nv_ro32(bios, init->offset + 1); in init_zm_reg_sequence()
1271 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_reg_sequence()
1274 init->offset += 6; in init_zm_reg_sequence()
1277 u32 data = nv_ro32(bios, init->offset); in init_zm_reg_sequence()
1280 init->offset += 4; in init_zm_reg_sequence()
1295 u16 addr = nv_ro16(bios, init->offset + 1); in init_sub_direct()
1301 save = init->offset; in init_sub_direct()
1302 init->offset = addr; in init_sub_direct()
1307 init->offset = save; in init_sub_direct()
1310 init->offset += 3; in init_sub_direct()
1321 u16 offset = nv_ro16(bios, init->offset + 1); in init_jump() local
1323 trace("JUMP\t0x%04x\n", offset); in init_jump()
1326 init->offset = offset; in init_jump()
1328 init->offset += 3; in init_jump()
1339 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_if()
1340 u8 addr = nv_ro08(bios, init->offset + 2); in init_i2c_if()
1341 u8 reg = nv_ro08(bios, init->offset + 3); in init_i2c_if()
1342 u8 mask = nv_ro08(bios, init->offset + 4); in init_i2c_if()
1343 u8 data = nv_ro08(bios, init->offset + 5); in init_i2c_if()
1348 init->offset += 6; in init_i2c_if()
1366 u32 sreg = nv_ro32(bios, init->offset + 1); in init_copy_nv_reg()
1367 u8 shift = nv_ro08(bios, init->offset + 5); in init_copy_nv_reg()
1368 u32 smask = nv_ro32(bios, init->offset + 6); in init_copy_nv_reg()
1369 u32 sxor = nv_ro32(bios, init->offset + 10); in init_copy_nv_reg()
1370 u32 dreg = nv_ro32(bios, init->offset + 14); in init_copy_nv_reg()
1371 u32 dmask = nv_ro32(bios, init->offset + 18); in init_copy_nv_reg()
1378 init->offset += 22; in init_copy_nv_reg()
1392 u16 port = nv_ro16(bios, init->offset + 1); in init_zm_index_io()
1393 u8 index = nv_ro08(bios, init->offset + 3); in init_zm_index_io()
1394 u8 data = nv_ro08(bios, init->offset + 4); in init_zm_index_io()
1397 init->offset += 5; in init_zm_index_io()
1412 init->offset += 1; in init_compute_mem()
1428 u32 reg = nv_ro32(bios, init->offset + 1); in init_reset()
1429 u32 data1 = nv_ro32(bios, init->offset + 5); in init_reset()
1430 u32 data2 = nv_ro32(bios, init->offset + 9); in init_reset()
1434 init->offset += 13; in init_reset()
1468 init->offset += 1; in init_configure_mem()
1517 init->offset += 1; in init_configure_clk()
1551 init->offset += 1; in init_configure_preinit()
1574 u16 port = nv_ro16(bios, init->offset + 1); in init_io()
1575 u8 mask = nv_ro16(bios, init->offset + 3); in init_io()
1576 u8 data = nv_ro16(bios, init->offset + 4); in init_io()
1580 init->offset += 5; in init_io()
1614 u8 index = nv_ro08(bios, init->offset + 1); in init_sub()
1621 save = init->offset; in init_sub()
1622 init->offset = addr; in init_sub()
1627 init->offset = save; in init_sub()
1630 init->offset += 2; in init_sub()
1641 u8 mask = nv_ro08(bios, init->offset + 1); in init_ram_condition()
1642 u8 value = nv_ro08(bios, init->offset + 2); in init_ram_condition()
1646 init->offset += 3; in init_ram_condition()
1660 u32 reg = nv_ro32(bios, init->offset + 1); in init_nv_reg()
1661 u32 mask = nv_ro32(bios, init->offset + 5); in init_nv_reg()
1662 u32 data = nv_ro32(bios, init->offset + 9); in init_nv_reg()
1665 init->offset += 13; in init_nv_reg()
1678 u8 macro = nv_ro08(bios, init->offset + 1); in init_macro()
1691 init->offset += 2; in init_macro()
1702 init->offset += 1; in init_resume()
1714 u16 usec = nv_ro16(bios, init->offset + 1); in init_time()
1717 init->offset += 3; in init_time()
1735 u8 cond = nv_ro08(bios, init->offset + 1); in init_condition()
1738 init->offset += 2; in init_condition()
1752 u8 cond = nv_ro08(bios, init->offset + 1); in init_io_condition()
1755 init->offset += 2; in init_io_condition()
1769 u16 port = nv_ro16(bios, init->offset + 1); in init_index_io()
1770 u8 index = nv_ro16(bios, init->offset + 3); in init_index_io()
1771 u8 mask = nv_ro08(bios, init->offset + 4); in init_index_io()
1772 u8 data = nv_ro08(bios, init->offset + 5); in init_index_io()
1777 init->offset += 6; in init_index_io()
1791 u32 reg = nv_ro32(bios, init->offset + 1); in init_pll()
1792 u32 freq = nv_ro16(bios, init->offset + 5) * 10; in init_pll()
1795 init->offset += 7; in init_pll()
1808 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_reg()
1809 u32 data = nv_ro32(bios, init->offset + 5); in init_zm_reg()
1812 init->offset += 9; in init_zm_reg()
1828 u8 type = nv_ro08(bios, init->offset + 1); in init_ram_restrict_pll()
1834 init->offset += 2; in init_ram_restrict_pll()
1837 u32 freq = nv_ro32(bios, init->offset); in init_ram_restrict_pll()
1846 init->offset += 4; in init_ram_restrict_pll()
1860 init->offset += 1; in init_gpio()
1874 u32 addr = nv_ro32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1875 u8 incr = nv_ro08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1876 u8 num = nv_ro08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1883 init->offset += 7; in init_ram_restrict_zm_reg_group()
1888 u32 data = nv_ro32(bios, init->offset); in init_ram_restrict_zm_reg_group()
1897 init->offset += 4; in init_ram_restrict_zm_reg_group()
1912 u32 sreg = nv_ro32(bios, init->offset + 1); in init_copy_zm_reg()
1913 u32 dreg = nv_ro32(bios, init->offset + 5); in init_copy_zm_reg()
1916 init->offset += 9; in init_copy_zm_reg()
1929 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_reg_group()
1930 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_reg_group()
1933 init->offset += 6; in init_zm_reg_group()
1936 u32 data = nv_ro32(bios, init->offset); in init_zm_reg_group()
1939 init->offset += 4; in init_zm_reg_group()
1951 u32 saddr = nv_ro32(bios, init->offset + 1); in init_xlat()
1952 u8 sshift = nv_ro08(bios, init->offset + 5); in init_xlat()
1953 u8 smask = nv_ro08(bios, init->offset + 6); in init_xlat()
1954 u8 index = nv_ro08(bios, init->offset + 7); in init_xlat()
1955 u32 daddr = nv_ro32(bios, init->offset + 8); in init_xlat()
1956 u32 dmask = nv_ro32(bios, init->offset + 12); in init_xlat()
1957 u8 shift = nv_ro08(bios, init->offset + 16); in init_xlat()
1964 init->offset += 17; in init_xlat()
1979 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_mask_add()
1980 u32 mask = nv_ro32(bios, init->offset + 5); in init_zm_mask_add()
1981 u32 add = nv_ro32(bios, init->offset + 9); in init_zm_mask_add()
1985 init->offset += 13; in init_zm_mask_add()
2000 u32 addr = nv_ro32(bios, init->offset + 1); in init_auxch()
2001 u8 count = nv_ro08(bios, init->offset + 5); in init_auxch()
2004 init->offset += 6; in init_auxch()
2007 u8 mask = nv_ro08(bios, init->offset + 0); in init_auxch()
2008 u8 data = nv_ro08(bios, init->offset + 1); in init_auxch()
2012 init->offset += 2; in init_auxch()
2024 u32 addr = nv_ro32(bios, init->offset + 1); in init_zm_auxch()
2025 u8 count = nv_ro08(bios, init->offset + 5); in init_zm_auxch()
2028 init->offset += 6; in init_zm_auxch()
2031 u8 data = nv_ro08(bios, init->offset + 0); in init_zm_auxch()
2034 init->offset += 1; in init_zm_auxch()
2046 u8 index = nv_ro08(bios, init->offset + 1); in init_i2c_long_if()
2047 u8 addr = nv_ro08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2048 u8 reglo = nv_ro08(bios, init->offset + 3); in init_i2c_long_if()
2049 u8 reghi = nv_ro08(bios, init->offset + 4); in init_i2c_long_if()
2050 u8 mask = nv_ro08(bios, init->offset + 5); in init_i2c_long_if()
2051 u8 data = nv_ro08(bios, init->offset + 6); in init_i2c_long_if()
2057 init->offset += 7; in init_i2c_long_if()
2087 u8 count = nv_ro08(bios, init->offset + 1); in init_gpio_ne()
2092 init->offset += 2; in init_gpio_ne()
2094 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2100 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2106 if (i == (init->offset + count)) { in init_gpio_ne()
2115 init->offset += count; in init_gpio_ne()
2194 while (init->offset) { in nvbios_exec()
2195 u8 opcode = nv_ro08(init->bios, init->offset); in nvbios_exec()
2221 .offset = data, in nvbios_init()
2237 .offset = data, in nvbios_init()