Lines Matching refs:vblank
53 chan->vblank.ctxdma = gpuobj->node->offset >> 4; in nv50_sw_mthd_dma_vblsem()
65 chan->vblank.offset = *(u32 *)args; in nv50_sw_mthd_vblsem_offset()
74 chan->vblank.value = *(u32 *)args; in nv50_sw_mthd_vblsem_value()
84 if (head >= nvkm_disp(chan)->vblank.index_nr) in nv50_sw_mthd_vblsem_release()
87 nvkm_notify_get(&chan->vblank.notify[head]); in nv50_sw_mthd_vblsem_release()
124 container_of(notify, typeof(*chan), vblank.notify[notify->index]); in nv50_sw_vblsem_release()
128 nv_wr32(priv, 0x001704, chan->vblank.channel); in nv50_sw_vblsem_release()
129 nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); in nv50_sw_vblsem_release()
133 nv_wr32(priv, 0x001570, chan->vblank.offset); in nv50_sw_vblsem_release()
134 nv_wr32(priv, 0x001574, chan->vblank.value); in nv50_sw_vblsem_release()
136 nv_wr32(priv, 0x060010, chan->vblank.offset); in nv50_sw_vblsem_release()
137 nv_wr32(priv, 0x060014, chan->vblank.value); in nv50_sw_vblsem_release()
149 for (i = 0; i < ARRAY_SIZE(chan->vblank.notify); i++) in nv50_sw_context_dtor()
150 nvkm_notify_fini(&chan->vblank.notify[i]); in nv50_sw_context_dtor()
170 for (i = 0; pdisp && i < pdisp->vblank.index_nr; i++) { in nv50_sw_context_ctor()
171 ret = nvkm_notify_init(NULL, &pdisp->vblank, pclass->vblank, in nv50_sw_context_ctor()
178 &chan->vblank.notify[i]); in nv50_sw_context_ctor()
183 chan->vblank.channel = nv_gpuobj(parent->parent)->addr >> 12; in nv50_sw_context_ctor()
196 .vblank = nv50_sw_vblsem_release,