447 nv04_gr_set_ctx1(struct nvkm_object *object, u32 mask, u32 value)  in nv04_gr_set_ctx1()  argument
449 	struct nv04_gr_priv *priv = (void *)object->engine;  in nv04_gr_set_ctx1()
453 	tmp  = nv_ro32(object, 0x00);  in nv04_gr_set_ctx1()
456 	nv_wo32(object, 0x00, tmp);  in nv04_gr_set_ctx1()
463 nv04_gr_set_ctx_val(struct nvkm_object *object, u32 mask, u32 value)  in nv04_gr_set_ctx_val()  argument
468 	ctx1 = nv_ro32(object, 0x00);  in nv04_gr_set_ctx_val()
472 	tmp = nv_ro32(object, 0x0c);  in nv04_gr_set_ctx_val()
475 	nv_wo32(object, 0x0c, tmp);  in nv04_gr_set_ctx_val()
507 	nv04_gr_set_ctx1(object, 0x01000000, valid << 24);  in nv04_gr_set_ctx_val()
511 nv04_gr_mthd_set_operation(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_set_operation()  argument
514 	u32 class = nv_ro32(object, 0) & 0xff;  in nv04_gr_mthd_set_operation()
521 	nv04_gr_set_ctx1(object, 0x00038000, data << 15);  in nv04_gr_mthd_set_operation()
523 	nv04_gr_set_ctx_val(object, 0, 0);  in nv04_gr_mthd_set_operation()
528 nv04_gr_mthd_surf3d_clip_h(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_surf3d_clip_h()  argument
531 	struct nv04_gr_priv *priv = (void *)object->engine;  in nv04_gr_mthd_surf3d_clip_h()
549 nv04_gr_mthd_surf3d_clip_v(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_surf3d_clip_v()  argument
552 	struct nv04_gr_priv *priv = (void *)object->engine;  in nv04_gr_mthd_surf3d_clip_v()
570 nv04_gr_mthd_bind_class(struct nvkm_object *object, u32 *args, u32 size)  in nv04_gr_mthd_bind_class()  argument
572 	struct nvkm_instmem *imem = nvkm_instmem(object);  in nv04_gr_mthd_bind_class()
578 nv04_gr_mthd_bind_surf2d(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf2d()  argument
581 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf2d()
583 		nv04_gr_set_ctx1(object, 0x00004000, 0);  in nv04_gr_mthd_bind_surf2d()
584 		nv04_gr_set_ctx_val(object, 0x02000000, 0);  in nv04_gr_mthd_bind_surf2d()
587 		nv04_gr_set_ctx1(object, 0x00004000, 0);  in nv04_gr_mthd_bind_surf2d()
588 		nv04_gr_set_ctx_val(object, 0x02000000, 0x02000000);  in nv04_gr_mthd_bind_surf2d()
595 nv04_gr_mthd_bind_surf2d_swzsurf(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf2d_swzsurf()  argument
598 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf2d_swzsurf()
600 		nv04_gr_set_ctx1(object, 0x00004000, 0);  in nv04_gr_mthd_bind_surf2d_swzsurf()
601 		nv04_gr_set_ctx_val(object, 0x02000000, 0);  in nv04_gr_mthd_bind_surf2d_swzsurf()
604 		nv04_gr_set_ctx1(object, 0x00004000, 0);  in nv04_gr_mthd_bind_surf2d_swzsurf()
605 		nv04_gr_set_ctx_val(object, 0x02000000, 0x02000000);  in nv04_gr_mthd_bind_surf2d_swzsurf()
608 		nv04_gr_set_ctx1(object, 0x00004000, 0x00004000);  in nv04_gr_mthd_bind_surf2d_swzsurf()
609 		nv04_gr_set_ctx_val(object, 0x02000000, 0x02000000);  in nv04_gr_mthd_bind_surf2d_swzsurf()
616 nv01_gr_mthd_bind_patt(struct nvkm_object *object, u32 mthd,  in nv01_gr_mthd_bind_patt()  argument
619 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv01_gr_mthd_bind_patt()
621 		nv04_gr_set_ctx_val(object, 0x08000000, 0);  in nv01_gr_mthd_bind_patt()
624 		nv04_gr_set_ctx_val(object, 0x08000000, 0x08000000);  in nv01_gr_mthd_bind_patt()
631 nv04_gr_mthd_bind_patt(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_patt()  argument
634 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_patt()
636 		nv04_gr_set_ctx_val(object, 0x08000000, 0);  in nv04_gr_mthd_bind_patt()
639 		nv04_gr_set_ctx_val(object, 0x08000000, 0x08000000);  in nv04_gr_mthd_bind_patt()
646 nv04_gr_mthd_bind_rop(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_rop()  argument
649 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_rop()
651 		nv04_gr_set_ctx_val(object, 0x10000000, 0);  in nv04_gr_mthd_bind_rop()
654 		nv04_gr_set_ctx_val(object, 0x10000000, 0x10000000);  in nv04_gr_mthd_bind_rop()
661 nv04_gr_mthd_bind_beta1(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_beta1()  argument
664 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_beta1()
666 		nv04_gr_set_ctx_val(object, 0x20000000, 0);  in nv04_gr_mthd_bind_beta1()
669 		nv04_gr_set_ctx_val(object, 0x20000000, 0x20000000);  in nv04_gr_mthd_bind_beta1()
676 nv04_gr_mthd_bind_beta4(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_beta4()  argument
679 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_beta4()
681 		nv04_gr_set_ctx_val(object, 0x40000000, 0);  in nv04_gr_mthd_bind_beta4()
684 		nv04_gr_set_ctx_val(object, 0x40000000, 0x40000000);  in nv04_gr_mthd_bind_beta4()
691 nv04_gr_mthd_bind_surf_dst(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf_dst()  argument
694 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf_dst()
696 		nv04_gr_set_ctx_val(object, 0x02000000, 0);  in nv04_gr_mthd_bind_surf_dst()
699 		nv04_gr_set_ctx_val(object, 0x02000000, 0x02000000);  in nv04_gr_mthd_bind_surf_dst()
706 nv04_gr_mthd_bind_surf_src(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf_src()  argument
709 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf_src()
711 		nv04_gr_set_ctx_val(object, 0x04000000, 0);  in nv04_gr_mthd_bind_surf_src()
714 		nv04_gr_set_ctx_val(object, 0x04000000, 0x04000000);  in nv04_gr_mthd_bind_surf_src()
721 nv04_gr_mthd_bind_surf_color(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf_color()  argument
724 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf_color()
726 		nv04_gr_set_ctx_val(object, 0x02000000, 0);  in nv04_gr_mthd_bind_surf_color()
729 		nv04_gr_set_ctx_val(object, 0x02000000, 0x02000000);  in nv04_gr_mthd_bind_surf_color()
736 nv04_gr_mthd_bind_surf_zeta(struct nvkm_object *object, u32 mthd,  in nv04_gr_mthd_bind_surf_zeta()  argument
739 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv04_gr_mthd_bind_surf_zeta()
741 		nv04_gr_set_ctx_val(object, 0x04000000, 0);  in nv04_gr_mthd_bind_surf_zeta()
744 		nv04_gr_set_ctx_val(object, 0x04000000, 0x04000000);  in nv04_gr_mthd_bind_surf_zeta()
751 nv01_gr_mthd_bind_clip(struct nvkm_object *object, u32 mthd,  in nv01_gr_mthd_bind_clip()  argument
754 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv01_gr_mthd_bind_clip()
756 		nv04_gr_set_ctx1(object, 0x2000, 0);  in nv01_gr_mthd_bind_clip()
759 		nv04_gr_set_ctx1(object, 0x2000, 0x2000);  in nv01_gr_mthd_bind_clip()
766 nv01_gr_mthd_bind_chroma(struct nvkm_object *object, u32 mthd,  in nv01_gr_mthd_bind_chroma()  argument
769 	switch (nv04_gr_mthd_bind_class(object, args, size)) {  in nv01_gr_mthd_bind_chroma()
771 		nv04_gr_set_ctx1(object, 0x1000, 0);  in nv01_gr_mthd_bind_chroma()
777 		nv04_gr_set_ctx1(object, 0x1000, 0x1000);  in nv01_gr_mthd_bind_chroma()
1147 nv04_gr_context_dtor(struct nvkm_object *object)  in nv04_gr_context_dtor()  argument
1149 	struct nv04_gr_priv *priv = (void *)object->engine;  in nv04_gr_context_dtor()
1150 	struct nv04_gr_chan *chan = (void *)object;  in nv04_gr_context_dtor()
1161 nv04_gr_context_fini(struct nvkm_object *object, bool suspend)  in nv04_gr_context_fini()  argument
1163 	struct nv04_gr_priv *priv = (void *)object->engine;  in nv04_gr_context_fini()
1164 	struct nv04_gr_chan *chan = (void *)object;  in nv04_gr_context_fini()
1278 			if (handle && !nv_call(handle->object, mthd, data))  in nv04_gr_intr()
1332 nv04_gr_init(struct nvkm_object *object)  in nv04_gr_init()  argument
1334 	struct nvkm_engine *engine = nv_engine(object);  in nv04_gr_init()