Lines Matching refs:base
63 { GT206_DISP_CORE_CHANNEL_DMA, &nv50_disp_core_ofuncs.base },
64 { GT200_DISP_BASE_CHANNEL_DMA, &nv50_disp_base_ofuncs.base },
65 { GT200_DISP_OVERLAY_CHANNEL_DMA, &nv50_disp_ovly_ofuncs.base },
66 { G82_DISP_OVERLAY, &nv50_disp_oimm_ofuncs.base },
67 { G82_DISP_CURSOR, &nv50_disp_curs_ofuncs.base },
118 &nv50_pior_dp_impl.base.base,
119 &g94_sor_dp_impl.base.base,
125 .base.base.handle = NV_ENGINE(DISP, 0x88),
126 .base.base.ofuncs = &(struct nvkm_ofuncs) {
132 .base.vblank = &nv50_disp_vblank_func,
133 .base.outp = g94_disp_outp_sclass,
135 .mthd.base = &g84_disp_base_mthd_chan,
139 }.base.base;