Lines Matching refs:device
46 nv30_identify(struct nvkm_device *device) in nv30_identify() argument
48 switch (device->chipset) { in nv30_identify()
50 device->cname = "NV30"; in nv30_identify()
51 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv30_identify()
52 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; in nv30_identify()
53 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; in nv30_identify()
54 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; in nv30_identify()
55 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass; in nv30_identify()
56 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; in nv30_identify()
57 device->oclass[NVDEV_SUBDEV_BUS ] = nv04_bus_oclass; in nv30_identify()
58 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv30_identify()
59 device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass; in nv30_identify()
60 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; in nv30_identify()
61 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
62 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; in nv30_identify()
63 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; in nv30_identify()
64 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; in nv30_identify()
65 device->oclass[NVDEV_ENGINE_GR ] = &nv30_gr_oclass; in nv30_identify()
66 device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; in nv30_identify()
69 device->cname = "NV35"; in nv30_identify()
70 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv30_identify()
71 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; in nv30_identify()
72 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; in nv30_identify()
73 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; in nv30_identify()
74 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass; in nv30_identify()
75 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; in nv30_identify()
76 device->oclass[NVDEV_SUBDEV_BUS ] = nv04_bus_oclass; in nv30_identify()
77 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv30_identify()
78 device->oclass[NVDEV_SUBDEV_FB ] = nv35_fb_oclass; in nv30_identify()
79 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; in nv30_identify()
80 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
81 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; in nv30_identify()
82 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; in nv30_identify()
83 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; in nv30_identify()
84 device->oclass[NVDEV_ENGINE_GR ] = &nv35_gr_oclass; in nv30_identify()
85 device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; in nv30_identify()
88 device->cname = "NV31"; in nv30_identify()
89 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv30_identify()
90 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; in nv30_identify()
91 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; in nv30_identify()
92 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; in nv30_identify()
93 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass; in nv30_identify()
94 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; in nv30_identify()
95 device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; in nv30_identify()
96 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv30_identify()
97 device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass; in nv30_identify()
98 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; in nv30_identify()
99 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
100 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; in nv30_identify()
101 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; in nv30_identify()
102 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; in nv30_identify()
103 device->oclass[NVDEV_ENGINE_GR ] = &nv30_gr_oclass; in nv30_identify()
104 device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; in nv30_identify()
105 device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; in nv30_identify()
108 device->cname = "NV36"; in nv30_identify()
109 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv30_identify()
110 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; in nv30_identify()
111 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; in nv30_identify()
112 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; in nv30_identify()
113 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass; in nv30_identify()
114 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; in nv30_identify()
115 device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; in nv30_identify()
116 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv30_identify()
117 device->oclass[NVDEV_SUBDEV_FB ] = nv36_fb_oclass; in nv30_identify()
118 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; in nv30_identify()
119 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
120 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; in nv30_identify()
121 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; in nv30_identify()
122 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; in nv30_identify()
123 device->oclass[NVDEV_ENGINE_GR ] = &nv35_gr_oclass; in nv30_identify()
124 device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; in nv30_identify()
125 device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; in nv30_identify()
128 device->cname = "NV34"; in nv30_identify()
129 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass; in nv30_identify()
130 device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass; in nv30_identify()
131 device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass; in nv30_identify()
132 device->oclass[NVDEV_SUBDEV_CLK ] = &nv04_clk_oclass; in nv30_identify()
133 device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass; in nv30_identify()
134 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; in nv30_identify()
135 device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; in nv30_identify()
136 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; in nv30_identify()
137 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass; in nv30_identify()
138 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv04_instmem_oclass; in nv30_identify()
139 device->oclass[NVDEV_SUBDEV_MMU ] = &nv04_mmu_oclass; in nv30_identify()
140 device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass; in nv30_identify()
141 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass; in nv30_identify()
142 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass; in nv30_identify()
143 device->oclass[NVDEV_ENGINE_GR ] = &nv34_gr_oclass; in nv30_identify()
144 device->oclass[NVDEV_ENGINE_MPEG ] = &nv31_mpeg_oclass; in nv30_identify()
145 device->oclass[NVDEV_ENGINE_DISP ] = nv04_disp_oclass; in nv30_identify()
148 nv_fatal(device, "unknown Rankine chipset\n"); in nv30_identify()