380 wr_cio_state(struct drm_device *dev, int head,  in wr_cio_state()  function
571 		wr_cio_state(dev, head, regp, i);  in nv_load_state_vga()
707 	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC0_INDEX);  in nv_load_state_ext()
708 	wr_cio_state(dev, head, regp, NV_CIO_CRE_RPC1_INDEX);  in nv_load_state_ext()
709 	wr_cio_state(dev, head, regp, NV_CIO_CRE_LSR_INDEX);  in nv_load_state_ext()
710 	wr_cio_state(dev, head, regp, NV_CIO_CRE_PIXEL_INDEX);  in nv_load_state_ext()
711 	wr_cio_state(dev, head, regp, NV_CIO_CRE_LCD__INDEX);  in nv_load_state_ext()
712 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HEB__INDEX);  in nv_load_state_ext()
713 	wr_cio_state(dev, head, regp, NV_CIO_CRE_ENH_INDEX);  in nv_load_state_ext()
714 	wr_cio_state(dev, head, regp, NV_CIO_CRE_FF_INDEX);  in nv_load_state_ext()
715 	wr_cio_state(dev, head, regp, NV_CIO_CRE_FFLWM__INDEX);  in nv_load_state_ext()
718 		wr_cio_state(dev, head, regp, NV_CIO_CRE_47);  in nv_load_state_ext()
721 		wr_cio_state(dev, head, regp, 0x9f);  in nv_load_state_ext()
723 	wr_cio_state(dev, head, regp, NV_CIO_CRE_49);  in nv_load_state_ext()
724 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);  in nv_load_state_ext()
725 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);  in nv_load_state_ext()
726 	wr_cio_state(dev, head, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);  in nv_load_state_ext()
729 	wr_cio_state(dev, head, regp, NV_CIO_CRE_ILACE__INDEX);  in nv_load_state_ext()
731 	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH3__INDEX);  in nv_load_state_ext()
732 	wr_cio_state(dev, head, regp, NV_CIO_CRE_SCRATCH4__INDEX);  in nv_load_state_ext()
734 		wr_cio_state(dev, head, regp, NV_CIO_CRE_EBR_INDEX);  in nv_load_state_ext()
735 		wr_cio_state(dev, head, regp, NV_CIO_CRE_CSB);  in nv_load_state_ext()
736 		wr_cio_state(dev, head, regp, NV_CIO_CRE_4B);  in nv_load_state_ext()
737 		wr_cio_state(dev, head, regp, NV_CIO_CRE_TVOUT_LATENCY);  in nv_load_state_ext()
748 		wr_cio_state(dev, head, regp, NV_CIO_CRE_42);  in nv_load_state_ext()
749 		wr_cio_state(dev, head, regp, NV_CIO_CRE_53);  in nv_load_state_ext()
750 		wr_cio_state(dev, head, regp, NV_CIO_CRE_54);  in nv_load_state_ext()
754 		wr_cio_state(dev, head, regp, NV_CIO_CRE_59);  in nv_load_state_ext()
755 		wr_cio_state(dev, head, regp, NV_CIO_CRE_5B);  in nv_load_state_ext()
757 		wr_cio_state(dev, head, regp, NV_CIO_CRE_85);  in nv_load_state_ext()
758 		wr_cio_state(dev, head, regp, NV_CIO_CRE_86);  in nv_load_state_ext()