92 	if (drm->device.info.chipset == 0x11) {  in NVSetOwner()
103 	if (drm->device.info.chipset == 0x11) {	/* set me harder */  in NVSetOwner()
152 		else if (drm->device.info.chipset == 0x30 || drm->device.info.chipset == 0x35) {  in nouveau_hw_decode_pll()
168 	struct nvif_device *device = &drm->device;  in nouveau_hw_get_pllvals()  local
169 	struct nvkm_bios *bios = nvxx_bios(device);  in nouveau_hw_get_pllvals()
178 	pll1 = nvif_rd32(device, reg1);  in nouveau_hw_get_pllvals()
180 		pll2 = nvif_rd32(device, reg1 + 4);  in nouveau_hw_get_pllvals()
184 		pll2 = nvif_rd32(device, reg2);  in nouveau_hw_get_pllvals()
187 	if (drm->device.info.family == NV_DEVICE_INFO_V0_CELSIUS && reg1 >= NV_PRAMDAC_VPLL_COEFF) {  in nouveau_hw_get_pllvals()
221 	    (dev->pdev->device & 0x0ff0) == CHIPSET_NFORCE) {  in nouveau_hw_get_clock()
231 	    (dev->pdev->device & 0xff0) == CHIPSET_NFORCE2) {  in nouveau_hw_get_clock()
255 	struct nvif_device *device = &drm->device;  in nouveau_hw_fix_bad_vpll()  local
256 	struct nvkm_clk *clk = nvxx_clk(device);  in nouveau_hw_fix_bad_vpll()
257 	struct nvkm_bios *bios = nvxx_bios(device);  in nouveau_hw_fix_bad_vpll()
394 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS)  in nv_save_state_ramdac()
401 	if (drm->device.info.chipset == 0x11)  in nv_save_state_ramdac()
408 	if (drm->device.info.chipset >= 0x30)  in nv_save_state_ramdac()
450 	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE) {  in nv_save_state_ramdac()
466 	struct nvkm_clk *clk = nvxx_clk(&drm->device);  in nv_load_state_ramdac()
471 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS)  in nv_load_state_ramdac()
478 	if (drm->device.info.chipset == 0x11)  in nv_load_state_ramdac()
485 	if (drm->device.info.chipset >= 0x30)  in nv_load_state_ramdac()
522 	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE) {  in nv_load_state_ramdac()
603 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_KELVIN)  in nv_save_state_ext()
606 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)  in nv_save_state_ext()
615 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {  in nv_save_state_ext()
619 		if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)  in nv_save_state_ext()
622 		if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)  in nv_save_state_ext()
634 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {  in nv_save_state_ext()
663 	struct nvif_device *device = &drm->device;  in nv_load_state_ext()  local
664 	struct nvkm_timer *ptimer = nvxx_timer(device);  in nv_load_state_ext()
669 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {  in nv_load_state_ext()
677 		nvif_wr32(device, NV_PVIDEO_STOP, 1);  in nv_load_state_ext()
678 		nvif_wr32(device, NV_PVIDEO_INTR_EN, 0);  in nv_load_state_ext()
679 		nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(0), 0);  in nv_load_state_ext()
680 		nvif_wr32(device, NV_PVIDEO_OFFSET_BUFF(1), 0);  in nv_load_state_ext()
681 		nvif_wr32(device, NV_PVIDEO_LIMIT(0), device->info.ram_size - 1);  in nv_load_state_ext()
682 		nvif_wr32(device, NV_PVIDEO_LIMIT(1), device->info.ram_size - 1);  in nv_load_state_ext()
683 		nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(0), device->info.ram_size - 1);  in nv_load_state_ext()
684 		nvif_wr32(device, NV_PVIDEO_UVPLANE_LIMIT(1), device->info.ram_size - 1);  in nv_load_state_ext()
685 		nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);  in nv_load_state_ext()
691 		if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)  in nv_load_state_ext()
694 		if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE) {  in nv_load_state_ext()
717 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_KELVIN)  in nv_load_state_ext()
720 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)  in nv_load_state_ext()
727 	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)  in nv_load_state_ext()
733 	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {  in nv_load_state_ext()
741 		if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) {  in nv_load_state_ext()
768 	struct nvif_device *device = &nouveau_drm(dev)->device;  in nv_save_state_palette()  local
771 	nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset,  in nv_save_state_palette()
773 	nvif_wr08(device, NV_PRMDIO_READ_MODE_ADDRESS + head_offset, 0x0);  in nv_save_state_palette()
776 		state->crtc_reg[head].DAC[i] = nvif_rd08(device,  in nv_save_state_palette()
787 	struct nvif_device *device = &nouveau_drm(dev)->device;  in nouveau_hw_load_state_palette()  local
790 	nvif_wr08(device, NV_PRMDIO_PIXEL_MASK + head_offset,  in nouveau_hw_load_state_palette()
792 	nvif_wr08(device, NV_PRMDIO_WRITE_MODE_ADDRESS + head_offset, 0x0);  in nouveau_hw_load_state_palette()
795 		nvif_wr08(device, NV_PRMDIO_PALETTE_DATA + head_offset,  in nouveau_hw_load_state_palette()
807 	if (drm->device.info.chipset == 0x11)  in nouveau_hw_save_state()