91 void ctl_write(struct mdp5_ctl *ctl, u32 reg, u32 data)  in ctl_write()  argument
93 	struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm);  in ctl_write()
95 	(void)ctl->reg_offset; /* TODO use this instead of mdp5_write */  in ctl_write()
100 u32 ctl_read(struct mdp5_ctl *ctl, u32 reg)  in ctl_read()  argument
102 	struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm);  in ctl_read()
104 	(void)ctl->reg_offset; /* TODO use this instead of mdp5_write */  in ctl_read()
143 static void set_ctl_op(struct mdp5_ctl *ctl, struct mdp5_interface *intf)  in set_ctl_op()  argument
166 	spin_lock_irqsave(&ctl->hw_lock, flags);  in set_ctl_op()
167 	ctl_write(ctl, REG_MDP5_CTL_OP(ctl->id), ctl_op);  in set_ctl_op()
168 	spin_unlock_irqrestore(&ctl->hw_lock, flags);  in set_ctl_op()
171 int mdp5_ctl_set_intf(struct mdp5_ctl *ctl, struct mdp5_interface *intf)  in mdp5_ctl_set_intf()  argument
173 	struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm;  in mdp5_ctl_set_intf()
176 	memcpy(&ctl->pipeline.intf, intf, sizeof(*intf));  in mdp5_ctl_set_intf()
178 	ctl->pipeline.start_mask = mdp_ctl_flush_mask_lm(ctl->lm) |  in mdp5_ctl_set_intf()
185 	set_ctl_op(ctl, intf);  in mdp5_ctl_set_intf()
190 static bool start_signal_needed(struct mdp5_ctl *ctl)  in start_signal_needed()  argument
192 	struct op_mode *pipeline = &ctl->pipeline;  in start_signal_needed()
214 static void send_start_signal(struct mdp5_ctl *ctl)  in send_start_signal()  argument
218 	spin_lock_irqsave(&ctl->hw_lock, flags);  in send_start_signal()
219 	ctl_write(ctl, REG_MDP5_CTL_START(ctl->id), 1);  in send_start_signal()
220 	spin_unlock_irqrestore(&ctl->hw_lock, flags);  in send_start_signal()
223 static void refill_start_mask(struct mdp5_ctl *ctl)  in refill_start_mask()  argument
225 	struct op_mode *pipeline = &ctl->pipeline;  in refill_start_mask()
226 	struct mdp5_interface *intf = &ctl->pipeline.intf;  in refill_start_mask()
228 	pipeline->start_mask = mdp_ctl_flush_mask_lm(ctl->lm);  in refill_start_mask()
246 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, bool enabled)  in mdp5_ctl_set_encoder_state()  argument
248 	if (WARN_ON(!ctl))  in mdp5_ctl_set_encoder_state()
251 	ctl->pipeline.encoder_enabled = enabled;  in mdp5_ctl_set_encoder_state()
252 	DBG("intf_%d: %s", ctl->pipeline.intf.num, enabled ? "on" : "off");  in mdp5_ctl_set_encoder_state()
254 	if (start_signal_needed(ctl)) {  in mdp5_ctl_set_encoder_state()
255 		send_start_signal(ctl);  in mdp5_ctl_set_encoder_state()
256 		refill_start_mask(ctl);  in mdp5_ctl_set_encoder_state()
267 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, int cursor_id, bool enable)  in mdp5_ctl_set_cursor()  argument
269 	struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm;  in mdp5_ctl_set_cursor()
272 	int lm = ctl->lm;  in mdp5_ctl_set_cursor()
276 				ctl->id, lm);  in mdp5_ctl_set_cursor()
280 	spin_lock_irqsave(&ctl->hw_lock, flags);  in mdp5_ctl_set_cursor()
282 	blend_cfg = ctl_read(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm));  in mdp5_ctl_set_cursor()
289 	ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm), blend_cfg);  in mdp5_ctl_set_cursor()
291 	spin_unlock_irqrestore(&ctl->hw_lock, flags);  in mdp5_ctl_set_cursor()
293 	ctl->pending_ctl_trigger = mdp_ctl_flush_mask_cursor(cursor_id);  in mdp5_ctl_set_cursor()
294 	ctl->cursor_on = enable;  in mdp5_ctl_set_cursor()
299 int mdp5_ctl_blend(struct mdp5_ctl *ctl, u32 lm, u32 blend_cfg)  in mdp5_ctl_blend()  argument
303 	if (ctl->cursor_on)  in mdp5_ctl_blend()
308 	spin_lock_irqsave(&ctl->hw_lock, flags);  in mdp5_ctl_blend()
309 	ctl_write(ctl, REG_MDP5_CTL_LAYER_REG(ctl->id, lm), blend_cfg);  in mdp5_ctl_blend()
310 	spin_unlock_irqrestore(&ctl->hw_lock, flags);  in mdp5_ctl_blend()
312 	ctl->pending_ctl_trigger = mdp_ctl_flush_mask_lm(lm);  in mdp5_ctl_blend()
368 static u32 fix_sw_flush(struct mdp5_ctl *ctl, u32 flush_mask)  in fix_sw_flush()  argument
370 	struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm;  in fix_sw_flush()
377 		sw_mask |= mdp_ctl_flush_mask_lm(ctl->lm);  in fix_sw_flush()
396 int mdp5_ctl_commit(struct mdp5_ctl *ctl, u32 flush_mask)  in mdp5_ctl_commit()  argument
398 	struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm;  in mdp5_ctl_commit()
399 	struct op_mode *pipeline = &ctl->pipeline;  in mdp5_ctl_commit()
405 			pipeline->start_mask, ctl->pending_ctl_trigger);  in mdp5_ctl_commit()
407 	if (ctl->pending_ctl_trigger & flush_mask) {  in mdp5_ctl_commit()
409 		ctl->pending_ctl_trigger = 0;  in mdp5_ctl_commit()
412 	flush_mask |= fix_sw_flush(ctl, flush_mask);  in mdp5_ctl_commit()
417 		spin_lock_irqsave(&ctl->hw_lock, flags);  in mdp5_ctl_commit()
418 		ctl_write(ctl, REG_MDP5_CTL_FLUSH(ctl->id), flush_mask);  in mdp5_ctl_commit()
419 		spin_unlock_irqrestore(&ctl->hw_lock, flags);  in mdp5_ctl_commit()
422 	if (start_signal_needed(ctl)) {  in mdp5_ctl_commit()
423 		send_start_signal(ctl);  in mdp5_ctl_commit()
424 		refill_start_mask(ctl);  in mdp5_ctl_commit()
430 void mdp5_ctl_release(struct mdp5_ctl *ctl)  in mdp5_ctl_release()  argument
432 	struct mdp5_ctl_manager *ctl_mgr = ctl->ctlm;  in mdp5_ctl_release()
435 	if (unlikely(WARN_ON(ctl->id >= MAX_CTL) || !ctl->busy)) {  in mdp5_ctl_release()
437 				ctl->id, ctl->busy);  in mdp5_ctl_release()
442 	ctl->busy = false;  in mdp5_ctl_release()
445 	DBG("CTL %d released", ctl->id);  in mdp5_ctl_release()
448 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl)  in mdp5_ctl_get_ctl_id()  argument
450 	return WARN_ON(!ctl) ? -EINVAL : ctl->id;  in mdp5_ctl_get_ctl_id()
463 	struct mdp5_ctl *ctl = NULL;  in mdp5_ctlm_request()  local
478 	ctl = &ctl_mgr->ctls[c];  in mdp5_ctlm_request()
480 	ctl->lm = mdp5_crtc_get_lm(crtc);  in mdp5_ctlm_request()
481 	ctl->crtc = crtc;  in mdp5_ctlm_request()
482 	ctl->busy = true;  in mdp5_ctlm_request()
483 	ctl->pending_ctl_trigger = 0;  in mdp5_ctlm_request()
484 	DBG("CTL %d allocated", ctl->id);  in mdp5_ctlm_request()
488 	return ctl;  in mdp5_ctlm_request()
497 		struct mdp5_ctl *ctl = &ctl_mgr->ctls[c];  in mdp5_ctlm_hw_reset()  local
499 		spin_lock_irqsave(&ctl->hw_lock, flags);  in mdp5_ctlm_hw_reset()
500 		ctl_write(ctl, REG_MDP5_CTL_OP(ctl->id), 0);  in mdp5_ctlm_hw_reset()
501 		spin_unlock_irqrestore(&ctl->hw_lock, flags);  in mdp5_ctlm_hw_reset()
514 	const struct mdp5_ctl_block *ctl_cfg = &hw_cfg->ctl;  in mdp5_ctlm_init()
542 		struct mdp5_ctl *ctl = &ctl_mgr->ctls[c];  in mdp5_ctlm_init()  local
549 		ctl->ctlm = ctl_mgr;  in mdp5_ctlm_init()
550 		ctl->id = c;  in mdp5_ctlm_init()
551 		ctl->reg_offset = ctl_cfg->base[c];  in mdp5_ctlm_init()
552 		ctl->busy = false;  in mdp5_ctlm_init()
553 		spin_lock_init(&ctl->hw_lock);  in mdp5_ctlm_init()