40 	struct dsi_dphy_timing timing;  member
61 static void dsi_dphy_timing_calc_clk_zero(struct dsi_dphy_timing *timing,  in dsi_dphy_timing_calc_clk_zero()  argument
68 	temp = 300 * coeff - ((timing->clk_prepare >> 1) + 1) * 2 * ui;  in dsi_dphy_timing_calc_clk_zero()
79 	temp = (timing->hs_rqst + timing->clk_prepare + clk_z) & 0x7;  in dsi_dphy_timing_calc_clk_zero()
80 	timing->clk_zero = clk_z + 8 - temp;  in dsi_dphy_timing_calc_clk_zero()
83 static int dsi_dphy_timing_calc(struct dsi_dphy_timing *timing,  in dsi_dphy_timing_calc()  argument
103 	timing->clk_prepare = linear_inter(tmax, tmin, pcnt0, 0, true);  in dsi_dphy_timing_calc()
107 		timing->hs_rqst = temp;  in dsi_dphy_timing_calc()
109 		timing->hs_rqst = max_t(s32, 0, temp - 2);  in dsi_dphy_timing_calc()
112 	dsi_dphy_timing_calc_clk_zero(timing, ui, coeff, pcnt2);  in dsi_dphy_timing_calc()
117 	timing->clk_trail = linear_inter(tmax, tmin, pcnt3, 0, true);  in dsi_dphy_timing_calc()
123 	timing->hs_prepare = linear_inter(tmax, tmin, pcnt1, 0, true);  in dsi_dphy_timing_calc()
126 	temp = ((timing->hs_prepare >> 1) + 1) * 2 * ui + 2 * ui;  in dsi_dphy_timing_calc()
129 	timing->hs_zero = linear_inter(tmax, tmin, pcnt2, 24, true);  in dsi_dphy_timing_calc()
135 	timing->hs_trail = linear_inter(tmax, tmin, pcnt3, 0, true);  in dsi_dphy_timing_calc()
139 	timing->hs_exit = linear_inter(tmax, tmin, pcnt2, 0, true);  in dsi_dphy_timing_calc()
142 	temp = ((timing->hs_exit >> 1) + 1) * 2 * ui;  in dsi_dphy_timing_calc()
145 	timing->clk_post = linear_inter(tmax, tmin, pcnt2, 0, false);  in dsi_dphy_timing_calc()
148 	temp = ((timing->clk_prepare >> 1) + 1) * 2 * ui;  in dsi_dphy_timing_calc()
149 	temp += ((timing->clk_zero >> 1) + 1) * 2 * ui;  in dsi_dphy_timing_calc()
154 		timing->clk_pre = temp >> 1;  in dsi_dphy_timing_calc()
157 		timing->clk_pre = linear_inter(tmax, tmin, pcnt2, 0, false);  in dsi_dphy_timing_calc()
160 	timing->ta_go = 3;  in dsi_dphy_timing_calc()
161 	timing->ta_sure = 0;  in dsi_dphy_timing_calc()
162 	timing->ta_get = 4;  in dsi_dphy_timing_calc()
165 		timing->clk_pre, timing->clk_post, timing->clk_zero,  in dsi_dphy_timing_calc()
166 		timing->clk_trail, timing->clk_prepare, timing->hs_exit,  in dsi_dphy_timing_calc()
167 		timing->hs_zero, timing->hs_prepare, timing->hs_trail,  in dsi_dphy_timing_calc()
168 		timing->hs_rqst);  in dsi_dphy_timing_calc()
195 	struct dsi_dphy_timing *timing = &phy->timing;  in dsi_28nm_phy_enable()  local
201 	if (dsi_dphy_timing_calc(timing, bit_rate, esc_rate)) {  in dsi_28nm_phy_enable()
213 		DSI_28nm_PHY_TIMING_CTRL_0_CLK_ZERO(timing->clk_zero));  in dsi_28nm_phy_enable()
215 		DSI_28nm_PHY_TIMING_CTRL_1_CLK_TRAIL(timing->clk_trail));  in dsi_28nm_phy_enable()
217 		DSI_28nm_PHY_TIMING_CTRL_2_CLK_PREPARE(timing->clk_prepare));  in dsi_28nm_phy_enable()
218 	if (timing->clk_zero & BIT(8))  in dsi_28nm_phy_enable()
222 		DSI_28nm_PHY_TIMING_CTRL_4_HS_EXIT(timing->hs_exit));  in dsi_28nm_phy_enable()
224 		DSI_28nm_PHY_TIMING_CTRL_5_HS_ZERO(timing->hs_zero));  in dsi_28nm_phy_enable()
226 		DSI_28nm_PHY_TIMING_CTRL_6_HS_PREPARE(timing->hs_prepare));  in dsi_28nm_phy_enable()
228 		DSI_28nm_PHY_TIMING_CTRL_7_HS_TRAIL(timing->hs_trail));  in dsi_28nm_phy_enable()
230 		DSI_28nm_PHY_TIMING_CTRL_8_HS_RQST(timing->hs_rqst));  in dsi_28nm_phy_enable()
232 		DSI_28nm_PHY_TIMING_CTRL_9_TA_GO(timing->ta_go) |  in dsi_28nm_phy_enable()
233 		DSI_28nm_PHY_TIMING_CTRL_9_TA_SURE(timing->ta_sure));  in dsi_28nm_phy_enable()
235 		DSI_28nm_PHY_TIMING_CTRL_10_TA_GET(timing->ta_get));  in dsi_28nm_phy_enable()
348 		*clk_pre = phy->timing.clk_pre;  in msm_dsi_phy_get_clk_pre_post()
350 		*clk_post = phy->timing.clk_post;  in msm_dsi_phy_get_clk_pre_post()