291 static inline uint32_t REG_A4XX_RB_MRT(uint32_t i0) { return 0x000020a4 + 0x5*i0; }  in REG_A4XX_RB_MRT()
293 static inline uint32_t REG_A4XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020a4 + 0x5*i0; }  in REG_A4XX_RB_MRT_CONTROL()
306 static inline uint32_t REG_A4XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x000020a5 + 0x5*i0; }  in REG_A4XX_RB_MRT_BUF_INFO()
332 static inline uint32_t REG_A4XX_RB_MRT_BASE(uint32_t i0) { return 0x000020a6 + 0x5*i0; }  in REG_A4XX_RB_MRT_BASE()
334 static inline uint32_t REG_A4XX_RB_MRT_CONTROL3(uint32_t i0) { return 0x000020a7 + 0x5*i0; }  in REG_A4XX_RB_MRT_CONTROL3()
342 static inline uint32_t REG_A4XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x000020a8 + 0x5*i0; }  in REG_A4XX_RB_MRT_BLEND_CONTROL()
710 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP(uint32_t i0) { return 0x00002120 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP()
712 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MIN(uint32_t i0) { return 0x00002120 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP_MIN()
714 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MAX(uint32_t i0) { return 0x00002121 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP_MAX()
720 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP(uint32_t i0) { return 0x00000004 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_TP()
722 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP_REG(uint32_t i0) { return 0x00000004 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_TP_REG()
724 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP(uint32_t i0) { return 0x00000008 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_TP()
726 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP_REG(uint32_t i0) { return 0x00000008 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_TP_REG()
728 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP(uint32_t i0) { return 0x0000000c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_TP()
730 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP_REG(uint32_t i0) { return 0x0000000c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_TP_REG()
732 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP(uint32_t i0) { return 0x00000010 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_TP()
734 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP_REG(uint32_t i0) { return 0x00000010 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_TP_REG()
810 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP(uint32_t i0) { return 0x00000068 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_SP()
812 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP_REG(uint32_t i0) { return 0x00000068 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_SP_REG()
814 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP(uint32_t i0) { return 0x0000006c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_SP()
816 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP_REG(uint32_t i0) { return 0x0000006c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_SP_REG()
818 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP(uint32_t i0) { return 0x00000070 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_SP()
820 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP_REG(uint32_t i0) { return 0x00000070 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_SP_REG()
822 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP(uint32_t i0) { return 0x00000074 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_SP()
824 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP_REG(uint32_t i0) { return 0x00000074 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_SP_REG()
826 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB(uint32_t i0) { return 0x00000078 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_RB()
828 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB_REG(uint32_t i0) { return 0x00000078 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_RB_REG()
830 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB(uint32_t i0) { return 0x0000007c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_RB()
832 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB_REG(uint32_t i0) { return 0x0000007c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_RB_REG()
834 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU(uint32_t i0) { return 0x00000082 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU()
836 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG(uint32_t i0) { return 0x00000082 + 0x1*…  in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG()
838 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU(uint32_t i0) { return 0x00000086 + 0x1*…  in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU()
840 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG(uint32_t i0) { return 0x00000086 + …  in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG()
854 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1(uint32_t i0) { return 0x0000008e + …  in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1()
856 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0) { return 0x0000008…  in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG()
977 static inline uint32_t REG_A4XX_CP_PROTECT(uint32_t i0) { return 0x00000240 + 0x1*i0; }  in REG_A4XX_CP_PROTECT()
979 static inline uint32_t REG_A4XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000240 + 0x1*i0; }  in REG_A4XX_CP_PROTECT_REG()
1001 static inline uint32_t REG_A4XX_CP_SCRATCH(uint32_t i0) { return 0x00000578 + 0x1*i0; }  in REG_A4XX_CP_SCRATCH()
1003 static inline uint32_t REG_A4XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000578 + 0x1*i0; }  in REG_A4XX_CP_SCRATCH_REG()
1084 static inline uint32_t REG_A4XX_SP_VS_OUT(uint32_t i0) { return 0x000022c7 + 0x1*i0; }  in REG_A4XX_SP_VS_OUT()
1086 static inline uint32_t REG_A4XX_SP_VS_OUT_REG(uint32_t i0) { return 0x000022c7 + 0x1*i0; }  in REG_A4XX_SP_VS_OUT_REG()
1112 static inline uint32_t REG_A4XX_SP_VS_VPC_DST(uint32_t i0) { return 0x000022d8 + 0x1*i0; }  in REG_A4XX_SP_VS_VPC_DST()
1114 static inline uint32_t REG_A4XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x000022d8 + 0x1*i0; }  in REG_A4XX_SP_VS_VPC_DST_REG()
1240 static inline uint32_t REG_A4XX_SP_FS_MRT(uint32_t i0) { return 0x000022f1 + 0x1*i0; }  in REG_A4XX_SP_FS_MRT()
1242 static inline uint32_t REG_A4XX_SP_FS_MRT_REG(uint32_t i0) { return 0x000022f1 + 0x1*i0; }  in REG_A4XX_SP_FS_MRT_REG()
1345 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00002142 + 0x1*i0; }  in REG_A4XX_VPC_VARYING_INTERP()
1347 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00002142 + 0x1*i0; }  in REG_A4XX_VPC_VARYING_INTERP_MODE()
1349 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x0000214a + 0x1*i0; }  in REG_A4XX_VPC_VARYING_PS_REPL()
1351 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000214a + 0x1*i0;…  in REG_A4XX_VPC_VARYING_PS_REPL_MODE()
1375 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c08 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_CONFIG()
1377 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c08 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_CONFIG_REG()
1403 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_DATA_ADDRESS()
1405 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0…  in REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG()
1407 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c18 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_DATA_LENGTH()
1409 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c18 + 0x1*i0;…  in REG_A4XX_VSC_PIPE_DATA_LENGTH_REG()
1481 static inline uint32_t REG_A4XX_VFD_FETCH(uint32_t i0) { return 0x0000220a + 0x4*i0; }  in REG_A4XX_VFD_FETCH()
1483 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x0000220a + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_0()
1499 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_1()
1501 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_2()
1509 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_3()
1517 static inline uint32_t REG_A4XX_VFD_DECODE(uint32_t i0) { return 0x0000228a + 0x1*i0; }  in REG_A4XX_VFD_DECODE()
1519 static inline uint32_t REG_A4XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000228a + 0x1*i0; }  in REG_A4XX_VFD_DECODE_INSTR()