84 	enum pipe pipe = crtc->pipe;  in intel_pipe_update_start()  local
122 				  pipe_name(crtc->pipe));  in intel_pipe_update_start()
137 	*start_vbl_count = dev->driver->get_vblank_counter(dev, pipe);  in intel_pipe_update_start()
156 	enum pipe pipe = crtc->pipe;  in intel_pipe_update_end()  local
157 	u32 end_vbl_count = dev->driver->get_vblank_counter(dev, pipe);  in intel_pipe_update_end()
165 			  pipe_name(pipe), start_vbl_count, end_vbl_count);  in intel_pipe_update_end()
191 	const int pipe = intel_plane->pipe;  in skl_update_plane()  local
274 		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);  in skl_update_plane()
275 		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);  in skl_update_plane()
276 		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);  in skl_update_plane()
286 	I915_WRITE(PLANE_OFFSET(pipe, plane), (y << 16) | x);  in skl_update_plane()
287 	I915_WRITE(PLANE_STRIDE(pipe, plane), fb->pitches[0] / stride_div);  in skl_update_plane()
288 	I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x);  in skl_update_plane()
289 	I915_WRITE(PLANE_SIZE(pipe, plane), (crtc_h << 16) | crtc_w);  in skl_update_plane()
290 	I915_WRITE(PLANE_CTL(pipe, plane), plane_ctl);  in skl_update_plane()
291 	I915_WRITE(PLANE_SURF(pipe, plane), surf_addr);  in skl_update_plane()
292 	POSTING_READ(PLANE_SURF(pipe, plane));  in skl_update_plane()
301 	const int pipe = intel_plane->pipe;  in skl_disable_plane()  local
304 	I915_WRITE(PLANE_CTL(pipe, plane), 0);  in skl_disable_plane()
307 	I915_WRITE(PLANE_SURF(pipe, plane), 0);  in skl_disable_plane()
308 	POSTING_READ(PLANE_SURF(pipe, plane));  in skl_disable_plane()
365 	int pipe = intel_plane->pipe;  in vlv_update_plane()  local
454 		I915_WRITE(SPKEYMINVAL(pipe, plane), key->min_value);  in vlv_update_plane()
455 		I915_WRITE(SPKEYMAXVAL(pipe, plane), key->max_value);  in vlv_update_plane()
456 		I915_WRITE(SPKEYMSK(pipe, plane), key->channel_mask);  in vlv_update_plane()
462 	if (IS_CHERRYVIEW(dev) && pipe == PIPE_B)  in vlv_update_plane()
465 	I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);  in vlv_update_plane()
466 	I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);  in vlv_update_plane()
469 		I915_WRITE(SPTILEOFF(pipe, plane), (y << 16) | x);  in vlv_update_plane()
471 		I915_WRITE(SPLINOFF(pipe, plane), linear_offset);  in vlv_update_plane()
473 	I915_WRITE(SPCONSTALPHA(pipe, plane), 0);  in vlv_update_plane()
475 	I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w);  in vlv_update_plane()
476 	I915_WRITE(SPCNTR(pipe, plane), sprctl);  in vlv_update_plane()
477 	I915_WRITE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) +  in vlv_update_plane()
490 	int pipe = intel_plane->pipe;  in vlv_disable_plane()  local
495 	I915_WRITE(SPCNTR(pipe, plane), 0);  in vlv_disable_plane()
498 	I915_WRITE(SPSURF(pipe, plane), 0);  in vlv_disable_plane()
519 	enum pipe pipe = intel_plane->pipe;  in ivb_update_plane()  local
601 		I915_WRITE(SPRKEYVAL(pipe), key->min_value);  in ivb_update_plane()
602 		I915_WRITE(SPRKEYMAX(pipe), key->max_value);  in ivb_update_plane()
603 		I915_WRITE(SPRKEYMSK(pipe), key->channel_mask);  in ivb_update_plane()
611 	I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);  in ivb_update_plane()
612 	I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);  in ivb_update_plane()
617 		I915_WRITE(SPROFFSET(pipe), (y << 16) | x);  in ivb_update_plane()
619 		I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x);  in ivb_update_plane()
621 		I915_WRITE(SPRLINOFF(pipe), linear_offset);  in ivb_update_plane()
623 	I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);  in ivb_update_plane()
625 		I915_WRITE(SPRSCALE(pipe), sprscale);  in ivb_update_plane()
626 	I915_WRITE(SPRCTL(pipe), sprctl);  in ivb_update_plane()
627 	I915_WRITE(SPRSURF(pipe),  in ivb_update_plane()
640 	int pipe = intel_plane->pipe;  in ivb_disable_plane()  local
644 	I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);  in ivb_disable_plane()
647 		I915_WRITE(SPRSCALE(pipe), 0);  in ivb_disable_plane()
649 	I915_WRITE(SPRSURF(pipe), 0);  in ivb_disable_plane()
667 	int pipe = intel_plane->pipe;  in ilk_update_plane()  local
741 		I915_WRITE(DVSKEYVAL(pipe), key->min_value);  in ilk_update_plane()
742 		I915_WRITE(DVSKEYMAX(pipe), key->max_value);  in ilk_update_plane()
743 		I915_WRITE(DVSKEYMSK(pipe), key->channel_mask);  in ilk_update_plane()
751 	I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);  in ilk_update_plane()
752 	I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x);  in ilk_update_plane()
755 		I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x);  in ilk_update_plane()
757 		I915_WRITE(DVSLINOFF(pipe), linear_offset);  in ilk_update_plane()
759 	I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);  in ilk_update_plane()
760 	I915_WRITE(DVSSCALE(pipe), dvsscale);  in ilk_update_plane()
761 	I915_WRITE(DVSCNTR(pipe), dvscntr);  in ilk_update_plane()
762 	I915_WRITE(DVSSURF(pipe),  in ilk_update_plane()
775 	int pipe = intel_plane->pipe;  in ilk_disable_plane()  local
779 	I915_WRITE(DVSCNTR(pipe), 0);  in ilk_disable_plane()
781 	I915_WRITE(DVSSCALE(pipe), 0);  in ilk_disable_plane()
784 	I915_WRITE(DVSSURF(pipe), 0);  in ilk_disable_plane()
811 		intel_wait_for_vblank(dev, intel_crtc->pipe);  in intel_post_enable_primary()
887 	if (intel_plane->pipe != intel_crtc->pipe) {  in intel_check_sprite_plane()
1037 			INTEL_FRONTBUFFER_SPRITE(intel_crtc->pipe);  in intel_check_sprite_plane()
1193 intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)  in intel_plane_init()  argument
1275 	intel_plane->pipe = pipe;  in intel_plane_init()
1279 	possible_crtcs = (1 << pipe);  in intel_plane_init()