Lines Matching refs:mode

598 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)  in intel_sdvo_get_pixel_multiplier()  argument
600 if (mode->clock >= 100000) in intel_sdvo_get_pixel_multiplier()
602 else if (mode->clock >= 50000) in intel_sdvo_get_pixel_multiplier()
679 int mode) in intel_sdvo_set_encoder_power_state() argument
683 switch (mode) { in intel_sdvo_set_encoder_power_state()
804 const struct drm_display_mode *mode) in intel_sdvo_get_dtd_from_mode() argument
813 width = mode->hdisplay; in intel_sdvo_get_dtd_from_mode()
814 height = mode->vdisplay; in intel_sdvo_get_dtd_from_mode()
817 h_blank_len = mode->htotal - mode->hdisplay; in intel_sdvo_get_dtd_from_mode()
818 h_sync_len = mode->hsync_end - mode->hsync_start; in intel_sdvo_get_dtd_from_mode()
820 v_blank_len = mode->vtotal - mode->vdisplay; in intel_sdvo_get_dtd_from_mode()
821 v_sync_len = mode->vsync_end - mode->vsync_start; in intel_sdvo_get_dtd_from_mode()
823 h_sync_offset = mode->hsync_start - mode->hdisplay; in intel_sdvo_get_dtd_from_mode()
824 v_sync_offset = mode->vsync_start - mode->vdisplay; in intel_sdvo_get_dtd_from_mode()
826 mode_clock = mode->clock; in intel_sdvo_get_dtd_from_mode()
848 if (mode->flags & DRM_MODE_FLAG_INTERLACE) in intel_sdvo_get_dtd_from_mode()
850 if (mode->flags & DRM_MODE_FLAG_PHSYNC) in intel_sdvo_get_dtd_from_mode()
852 if (mode->flags & DRM_MODE_FLAG_PVSYNC) in intel_sdvo_get_dtd_from_mode()
861 struct drm_display_mode mode = {}; in intel_sdvo_get_mode_from_dtd() local
863 mode.hdisplay = dtd->part1.h_active; in intel_sdvo_get_mode_from_dtd()
864 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; in intel_sdvo_get_mode_from_dtd()
865 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; in intel_sdvo_get_mode_from_dtd()
866 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; in intel_sdvo_get_mode_from_dtd()
867 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; in intel_sdvo_get_mode_from_dtd()
868 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; in intel_sdvo_get_mode_from_dtd()
869 mode.htotal = mode.hdisplay + dtd->part1.h_blank; in intel_sdvo_get_mode_from_dtd()
870 mode.htotal += (dtd->part1.h_high & 0xf) << 8; in intel_sdvo_get_mode_from_dtd()
872 mode.vdisplay = dtd->part1.v_active; in intel_sdvo_get_mode_from_dtd()
873 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; in intel_sdvo_get_mode_from_dtd()
874 mode.vsync_start = mode.vdisplay; in intel_sdvo_get_mode_from_dtd()
875 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; in intel_sdvo_get_mode_from_dtd()
876 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; in intel_sdvo_get_mode_from_dtd()
877 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0; in intel_sdvo_get_mode_from_dtd()
878 mode.vsync_end = mode.vsync_start + in intel_sdvo_get_mode_from_dtd()
880 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; in intel_sdvo_get_mode_from_dtd()
881 mode.vtotal = mode.vdisplay + dtd->part1.v_blank; in intel_sdvo_get_mode_from_dtd()
882 mode.vtotal += (dtd->part1.v_high & 0xf) << 8; in intel_sdvo_get_mode_from_dtd()
884 mode.clock = dtd->part1.clock * 10; in intel_sdvo_get_mode_from_dtd()
887 mode.flags |= DRM_MODE_FLAG_INTERLACE; in intel_sdvo_get_mode_from_dtd()
889 mode.flags |= DRM_MODE_FLAG_PHSYNC; in intel_sdvo_get_mode_from_dtd()
891 mode.flags |= DRM_MODE_FLAG_NHSYNC; in intel_sdvo_get_mode_from_dtd()
893 mode.flags |= DRM_MODE_FLAG_PVSYNC; in intel_sdvo_get_mode_from_dtd()
895 mode.flags |= DRM_MODE_FLAG_NVSYNC; in intel_sdvo_get_mode_from_dtd()
897 drm_mode_set_crtcinfo(&mode, 0); in intel_sdvo_get_mode_from_dtd()
899 drm_mode_copy(pmode, &mode); in intel_sdvo_get_mode_from_dtd()
913 uint8_t mode) in intel_sdvo_set_encode() argument
915 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); in intel_sdvo_set_encode()
919 uint8_t mode) in intel_sdvo_set_colorimetry() argument
921 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); in intel_sdvo_set_colorimetry()
1045 const struct drm_display_mode *mode) in intel_sdvo_set_output_timings_from_mode() argument
1053 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); in intel_sdvo_set_output_timings_from_mode()
1064 const struct drm_display_mode *mode, in intel_sdvo_get_preferred_input_mode() argument
1074 mode->clock / 10, in intel_sdvo_get_preferred_input_mode()
1075 mode->hdisplay, in intel_sdvo_get_preferred_input_mode()
1076 mode->vdisplay)) in intel_sdvo_get_preferred_input_mode()
1120 struct drm_display_mode *mode = &pipe_config->base.mode; in intel_sdvo_compute_config() local
1134 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) in intel_sdvo_compute_config()
1138 mode, in intel_sdvo_compute_config()
1147 mode, in intel_sdvo_compute_config()
1186 struct drm_display_mode *mode = &crtc->config->base.mode; in intel_sdvo_pre_enable() local
1193 if (!mode) in intel_sdvo_pre_enable()
1219 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); in intel_sdvo_pre_enable()
1509 static void intel_sdvo_dpms(struct drm_connector *connector, int mode) in intel_sdvo_dpms() argument
1515 if (mode != DRM_MODE_DPMS_ON) in intel_sdvo_dpms()
1516 mode = DRM_MODE_DPMS_OFF; in intel_sdvo_dpms()
1518 if (mode == connector->dpms) in intel_sdvo_dpms()
1521 connector->dpms = mode; in intel_sdvo_dpms()
1532 if (mode != DRM_MODE_DPMS_ON) { in intel_sdvo_dpms()
1535 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); in intel_sdvo_dpms()
1546 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); in intel_sdvo_dpms()
1555 struct drm_display_mode *mode) in intel_sdvo_mode_valid() argument
1559 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) in intel_sdvo_mode_valid()
1562 if (intel_sdvo->pixel_clock_min > mode->clock) in intel_sdvo_mode_valid()
1565 if (intel_sdvo->pixel_clock_max < mode->clock) in intel_sdvo_mode_valid()
1569 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) in intel_sdvo_mode_valid()
1572 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) in intel_sdvo_mode_valid()