Lines Matching refs:I915_WRITE
244 I915_WRITE(HSW_PWR_WELL_DRIVER, in hsw_set_power_well()
257 I915_WRITE(HSW_PWR_WELL_DRIVER, 0); in hsw_set_power_well()
364 I915_WRITE(HSW_PWR_WELL_DRIVER, tmp | req_mask); in skl_set_power_well()
377 I915_WRITE(HSW_PWR_WELL_DRIVER, tmp & ~req_mask); in skl_set_power_well()
409 I915_WRITE(HSW_PWR_WELL_BIOS, 0); in hsw_power_well_sync_hw()
439 I915_WRITE(HSW_PWR_WELL_BIOS, 0); in skl_power_well_sync_hw()
602 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in vlv_dpio_cmn_power_well_enable()
619 I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_CMNRST); in vlv_dpio_cmn_power_well_enable()
633 I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) & ~DPIO_CMNRST); in vlv_dpio_cmn_power_well_disable()
653 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in chv_dpio_cmn_power_well_enable()
655 I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) | in chv_dpio_cmn_power_well_enable()
659 I915_WRITE(DPLL(PIPE_C), I915_READ(DPLL(PIPE_C)) | in chv_dpio_cmn_power_well_enable()
669 I915_WRITE(DISPLAY_PHY_CONTROL, I915_READ(DISPLAY_PHY_CONTROL) | in chv_dpio_cmn_power_well_enable()
690 I915_WRITE(DISPLAY_PHY_CONTROL, I915_READ(DISPLAY_PHY_CONTROL) & in chv_dpio_cmn_power_well_disable()