217 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;  in intel_emit_post_sync_nonzero_flush()
254 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;  in gen6_render_ring_flush()
325 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;  in gen7_render_ring_flush()
408 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;  in gen8_render_ring_flush()
655 	if (ring->scratch.obj == NULL)  in intel_fini_pipe_control()
659 		kunmap(sg_page(ring->scratch.obj->pages->sgl));  in intel_fini_pipe_control()
660 		i915_gem_object_ggtt_unpin(ring->scratch.obj);  in intel_fini_pipe_control()
663 	drm_gem_object_unreference(&ring->scratch.obj->base);  in intel_fini_pipe_control()
664 	ring->scratch.obj = NULL;  in intel_fini_pipe_control()
672 	WARN_ON(ring->scratch.obj);  in intel_init_pipe_control()
674 	ring->scratch.obj = i915_gem_alloc_object(ring->dev, 4096);  in intel_init_pipe_control()
675 	if (ring->scratch.obj == NULL) {  in intel_init_pipe_control()
681 	ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);  in intel_init_pipe_control()
685 	ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);  in intel_init_pipe_control()
689 	ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(ring->scratch.obj);  in intel_init_pipe_control()
690 	ring->scratch.cpu_page = kmap(sg_page(ring->scratch.obj->pages->sgl));  in intel_init_pipe_control()
691 	if (ring->scratch.cpu_page == NULL) {  in intel_init_pipe_control()
697 			 ring->name, ring->scratch.gtt_offset);  in intel_init_pipe_control()
701 	i915_gem_object_ggtt_unpin(ring->scratch.obj);  in intel_init_pipe_control()
703 	drm_gem_object_unreference(&ring->scratch.obj->base);  in intel_init_pipe_control()
1360 	u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES;  in pc_render_add_request()
1378 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);  in pc_render_add_request()
1398 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);  in pc_render_add_request()
1436 	return ring->scratch.cpu_page[0];  in pc_render_get_seqno()
1442 	ring->scratch.cpu_page[0] = seqno;  in pc_render_set_seqno()
1741 	u32 cs_offset = ring->scratch.gtt_offset;  in i830_dispatch_execbuffer()
2621 		ring->scratch.obj = obj;  in intel_init_render_ring_buffer()
2622 		ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj);  in intel_init_render_ring_buffer()