Lines Matching refs:irq_enable_mask

1457 		gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask);  in gen5_ring_get_irq()
1472 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen5_ring_put_irq()
1488 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i9xx_ring_get_irq()
1506 dev_priv->irq_mask |= ring->irq_enable_mask; in i9xx_ring_put_irq()
1525 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i8xx_ring_get_irq()
1543 dev_priv->irq_mask |= ring->irq_enable_mask; in i8xx_ring_put_irq()
1600 ~(ring->irq_enable_mask | in gen6_ring_get_irq()
1603 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen6_ring_get_irq()
1604 gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_get_irq()
1624 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_put_irq()
1641 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in hsw_vebox_get_irq()
1642 gen6_enable_pm_irq(dev_priv, ring->irq_enable_mask); in hsw_vebox_get_irq()
1659 gen6_disable_pm_irq(dev_priv, ring->irq_enable_mask); in hsw_vebox_put_irq()
1678 ~(ring->irq_enable_mask | in gen8_ring_get_irq()
1681 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen8_ring_get_irq()
2523 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; in intel_init_render_ring_buffer()
2539 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; in intel_init_render_ring_buffer()
2570 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT | in intel_init_render_ring_buffer()
2587 ring->irq_enable_mask = I915_USER_INTERRUPT; in intel_init_render_ring_buffer()
2657 ring->irq_enable_mask = in intel_init_bsd_ring_buffer()
2669 ring->irq_enable_mask = GT_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2696 ring->irq_enable_mask = ILK_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2700 ring->irq_enable_mask = I915_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2728 ring->irq_enable_mask = in intel_init_bsd2_ring_buffer()
2759 ring->irq_enable_mask = in intel_init_blt_ring_buffer()
2770 ring->irq_enable_mask = GT_BLT_USER_INTERRUPT; in intel_init_blt_ring_buffer()
2817 ring->irq_enable_mask = in intel_init_vebox_ring_buffer()
2828 ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT; in intel_init_vebox_ring_buffer()