658 		adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in pineview_update_wm()
727 	adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in g4x_compute_wm0()
730 	hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in g4x_compute_wm0()
814 	adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in g4x_compute_srwm()
817 	hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in g4x_compute_srwm()
914 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in vlv_compute_drain_latency()
995 	if (crtc && to_intel_crtc(crtc)->pipe != PIPE_C) {  in vlv_compute_sr_wm()
996 		pipe = to_intel_crtc(crtc)->pipe;  in vlv_compute_sr_wm()
1006 	wm->sr.cursor = vlv_compute_wm(to_intel_crtc(crtc),  in vlv_compute_sr_wm()
1016 		wm->sr.plane = vlv_compute_wm(to_intel_crtc(crtc),  in vlv_compute_sr_wm()
1029 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in valleyview_update_wm()
1083 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in valleyview_update_sprite_wm()
1197 			&to_intel_crtc(crtc)->config->base.adjusted_mode;  in i965_update_wm()
1200 		int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;  in i965_update_wm()
1284 		adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in i9xx_update_wm()
1306 		adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in i9xx_update_wm()
1345 			&to_intel_crtc(enabled)->config->base.adjusted_mode;  in i9xx_update_wm()
1348 		int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w;  in i9xx_update_wm()
1401 	adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;  in i845_update_wm()
1417 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_pipe_pixel_rate()
1782 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in hsw_compute_linetime_wm()
2037 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_compute_wm_parameters()
2563 		if (!to_intel_crtc(crtc)->active)  in skl_ddb_get_pipe_allocation_limits()
2651 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_allocate_pipe_ddb()
2803 		config->num_pipes_active += to_intel_crtc(crtc)->active;  in skl_compute_wm_global_parameters()
2818 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_wm_pipe_parameters()
2974 	if (!to_intel_crtc(crtc)->active)  in skl_compute_linetime_wm()
2985 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_transition_wm()
3004 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_compute_pipe_wm()
3262 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_update_pipe_wm()
3281 	struct intel_crtc *this_crtc = to_intel_crtc(crtc);  in skl_update_other_pipe_wm()
3326 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_update_wm()
3380 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_update_wm()
3501 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in skl_pipe_wm_get_hw_state()
3564 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in ilk_pipe_wm_get_hw_state()