3958 	WARN_ON(val > dev_priv->rps.max_freq);  in gen6_set_rps()
3997 	WARN_ON(val > dev_priv->rps.max_freq);  in valleyview_set_rps()
4229 	dev_priv->rps.max_freq		= dev_priv->rps.rp0_freq;  in gen6_init_rps_frequencies()
4241 					dev_priv->rps.max_freq);  in gen6_init_rps_frequencies()
4248 		dev_priv->rps.max_freq_softlimit = dev_priv->rps.max_freq;  in gen6_init_rps_frequencies()
4502 		dev_priv->rps.max_freq = pcu_mbox & 0xff;  in gen6_enable_rps()
4538 		max_ia_freq = policy->cpuinfo.max_freq;  in __gen6_update_ring_freq()
4560 	for (gpu_freq = dev_priv->rps.max_freq; gpu_freq >= dev_priv->rps.min_freq;  in __gen6_update_ring_freq()
4562 		int diff = dev_priv->rps.max_freq - gpu_freq;  in __gen6_update_ring_freq()
4850 	dev_priv->rps.max_freq = valleyview_rps_max_freq(dev_priv);  in valleyview_init_gt_powersave()
4851 	dev_priv->rps.rp0_freq = dev_priv->rps.max_freq;  in valleyview_init_gt_powersave()
4853 			 intel_gpu_freq(dev_priv, dev_priv->rps.max_freq),  in valleyview_init_gt_powersave()
4854 			 dev_priv->rps.max_freq);  in valleyview_init_gt_powersave()
4875 		dev_priv->rps.max_freq_softlimit = dev_priv->rps.max_freq;  in valleyview_init_gt_powersave()
4921 	dev_priv->rps.max_freq = cherryview_rps_max_freq(dev_priv);  in cherryview_init_gt_powersave()
4922 	dev_priv->rps.rp0_freq = dev_priv->rps.max_freq;  in cherryview_init_gt_powersave()
4924 			 intel_gpu_freq(dev_priv, dev_priv->rps.max_freq),  in cherryview_init_gt_powersave()
4925 			 dev_priv->rps.max_freq);  in cherryview_init_gt_powersave()
4942 	WARN_ONCE((dev_priv->rps.max_freq |  in cherryview_init_gt_powersave()
4952 		dev_priv->rps.max_freq_softlimit = dev_priv->rps.max_freq;  in cherryview_init_gt_powersave()
5728 	WARN_ON(dev_priv->rps.max_freq < dev_priv->rps.min_freq);  in intel_gen6_powersave_work()
5729 	WARN_ON(dev_priv->rps.idle_freq > dev_priv->rps.max_freq);  in intel_gen6_powersave_work()
5732 	WARN_ON(dev_priv->rps.efficient_freq > dev_priv->rps.max_freq);  in intel_gen6_powersave_work()