570 				   struct put_image_params *params)  in update_scaling_factors()  argument
577 	int uv_hscale = uv_hsubsampling(params->format);  in update_scaling_factors()
578 	int uv_vscale = uv_vsubsampling(params->format);  in update_scaling_factors()
580 	if (params->dst_w > 1)  in update_scaling_factors()
581 		xscale = ((params->src_scan_w - 1) << FP_SHIFT)  in update_scaling_factors()
582 			/(params->dst_w);  in update_scaling_factors()
586 	if (params->dst_h > 1)  in update_scaling_factors()
587 		yscale = ((params->src_scan_h - 1) << FP_SHIFT)  in update_scaling_factors()
588 			/(params->dst_h);  in update_scaling_factors()
659 static u32 overlay_cmd_reg(struct put_image_params *params)  in overlay_cmd_reg()  argument
663 	if (params->format & I915_OVERLAY_YUV_PLANAR) {  in overlay_cmd_reg()
664 		switch (params->format & I915_OVERLAY_DEPTH_MASK) {  in overlay_cmd_reg()
677 		switch (params->format & I915_OVERLAY_DEPTH_MASK) {  in overlay_cmd_reg()
686 		switch (params->format & I915_OVERLAY_SWAP_MASK) {  in overlay_cmd_reg()
706 				      struct put_image_params *params)  in intel_overlay_do_put_image()  argument
758 	iowrite32((params->dst_y << 16) | params->dst_x, &regs->DWINPOS);  in intel_overlay_do_put_image()
759 	iowrite32((params->dst_h << 16) | params->dst_w, &regs->DWINSZ);  in intel_overlay_do_put_image()
761 	if (params->format & I915_OVERLAY_YUV_PACKED)  in intel_overlay_do_put_image()
762 		tmp_width = packed_width_bytes(params->format, params->src_w);  in intel_overlay_do_put_image()
764 		tmp_width = params->src_w;  in intel_overlay_do_put_image()
766 	swidth = params->src_w;  in intel_overlay_do_put_image()
767 	swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);  in intel_overlay_do_put_image()
768 	sheight = params->src_h;  in intel_overlay_do_put_image()
769 	iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, &regs->OBUF_0Y);  in intel_overlay_do_put_image()
770 	ostride = params->stride_Y;  in intel_overlay_do_put_image()
772 	if (params->format & I915_OVERLAY_YUV_PLANAR) {  in intel_overlay_do_put_image()
773 		int uv_hscale = uv_hsubsampling(params->format);  in intel_overlay_do_put_image()
774 		int uv_vscale = uv_vsubsampling(params->format);  in intel_overlay_do_put_image()
776 		swidth |= (params->src_w/uv_hscale) << 16;  in intel_overlay_do_put_image()
777 		tmp_U = calc_swidthsw(overlay->dev, params->offset_U,  in intel_overlay_do_put_image()
778 				      params->src_w/uv_hscale);  in intel_overlay_do_put_image()
779 		tmp_V = calc_swidthsw(overlay->dev, params->offset_V,  in intel_overlay_do_put_image()
780 				      params->src_w/uv_hscale);  in intel_overlay_do_put_image()
782 		sheight |= (params->src_h/uv_vscale) << 16;  in intel_overlay_do_put_image()
783 		iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_U, &regs->OBUF_0U);  in intel_overlay_do_put_image()
784 		iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_V, &regs->OBUF_0V);  in intel_overlay_do_put_image()
785 		ostride |= params->stride_UV << 16;  in intel_overlay_do_put_image()
793 	scale_changed = update_scaling_factors(overlay, regs, params);  in intel_overlay_do_put_image()
797 	iowrite32(overlay_cmd_reg(params), &regs->OCMD);  in intel_overlay_do_put_image()
1066 	struct put_image_params *params;  in intel_overlay_put_image()  local
1087 	params = kmalloc(sizeof(*params), GFP_KERNEL);  in intel_overlay_put_image()
1088 	if (!params)  in intel_overlay_put_image()
1145 		params->dst_y = ((((u32)put_image_rec->dst_y) << 12) /  in intel_overlay_put_image()
1148 		params->dst_h = ((((u32)put_image_rec->dst_height) << 12) /  in intel_overlay_put_image()
1151 		params->dst_y = put_image_rec->dst_y;  in intel_overlay_put_image()
1152 		params->dst_h = put_image_rec->dst_height;  in intel_overlay_put_image()
1154 	params->dst_x = put_image_rec->dst_x;  in intel_overlay_put_image()
1155 	params->dst_w = put_image_rec->dst_width;  in intel_overlay_put_image()
1157 	params->src_w = put_image_rec->src_width;  in intel_overlay_put_image()
1158 	params->src_h = put_image_rec->src_height;  in intel_overlay_put_image()
1159 	params->src_scan_w = put_image_rec->src_scan_width;  in intel_overlay_put_image()
1160 	params->src_scan_h = put_image_rec->src_scan_height;  in intel_overlay_put_image()
1161 	if (params->src_scan_h > params->src_h ||  in intel_overlay_put_image()
1162 	    params->src_scan_w > params->src_w) {  in intel_overlay_put_image()
1170 	params->format = put_image_rec->flags & ~I915_OVERLAY_FLAGS_MASK;  in intel_overlay_put_image()
1171 	params->stride_Y = put_image_rec->stride_Y;  in intel_overlay_put_image()
1172 	params->stride_UV = put_image_rec->stride_UV;  in intel_overlay_put_image()
1173 	params->offset_Y = put_image_rec->offset_Y;  in intel_overlay_put_image()
1174 	params->offset_U = put_image_rec->offset_U;  in intel_overlay_put_image()
1175 	params->offset_V = put_image_rec->offset_V;  in intel_overlay_put_image()
1178 	ret = check_overlay_scaling(params);  in intel_overlay_put_image()
1182 	ret = intel_overlay_do_put_image(overlay, new_bo, params);  in intel_overlay_put_image()
1189 	kfree(params);  in intel_overlay_put_image()
1198 	kfree(params);  in intel_overlay_put_image()