1365 	enum dpio_channel ch = vlv_dport_to_channel(dport);  in chv_hdmi_pre_pll_enable()  local
1377 		if (ch == DPIO_CH0)  in chv_hdmi_pre_pll_enable()
1379 		if (ch == DPIO_CH1)  in chv_hdmi_pre_pll_enable()
1385 		if (ch == DPIO_CH0)  in chv_hdmi_pre_pll_enable()
1387 		if (ch == DPIO_CH1)  in chv_hdmi_pre_pll_enable()
1393 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW8(ch));  in chv_hdmi_pre_pll_enable()
1399 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW8(ch), val);  in chv_hdmi_pre_pll_enable()
1401 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW8(ch));  in chv_hdmi_pre_pll_enable()
1407 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW8(ch), val);  in chv_hdmi_pre_pll_enable()
1414 	val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW19(ch));  in chv_hdmi_pre_pll_enable()
1419 	vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW19(ch), val);  in chv_hdmi_pre_pll_enable()
1447 	enum dpio_channel ch = vlv_dport_to_channel(dport);  in chv_hdmi_post_disable()  local
1454 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW1(ch));  in chv_hdmi_post_disable()
1456 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val);  in chv_hdmi_post_disable()
1458 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));  in chv_hdmi_post_disable()
1460 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW1(ch), val);  in chv_hdmi_post_disable()
1462 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW0(ch));  in chv_hdmi_post_disable()
1464 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val);  in chv_hdmi_post_disable()
1466 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));  in chv_hdmi_post_disable()
1468 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW0(ch), val);  in chv_hdmi_post_disable()
1483 	enum dpio_channel ch = vlv_dport_to_channel(dport);  in chv_hdmi_pre_enable()  local
1491 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW11(ch));  in chv_hdmi_pre_enable()
1493 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW11(ch), val);  in chv_hdmi_pre_enable()
1495 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW11(ch));  in chv_hdmi_pre_enable()
1497 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW11(ch), val);  in chv_hdmi_pre_enable()
1500 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW1(ch));  in chv_hdmi_pre_enable()
1502 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val);  in chv_hdmi_pre_enable()
1504 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));  in chv_hdmi_pre_enable()
1506 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW1(ch), val);  in chv_hdmi_pre_enable()
1508 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW0(ch));  in chv_hdmi_pre_enable()
1510 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val);  in chv_hdmi_pre_enable()
1512 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));  in chv_hdmi_pre_enable()
1514 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW0(ch), val);  in chv_hdmi_pre_enable()
1520 		vlv_dpio_write(dev_priv, pipe, CHV_TX_DW14(ch, i),  in chv_hdmi_pre_enable()
1528 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));  in chv_hdmi_pre_enable()
1532 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val);  in chv_hdmi_pre_enable()
1534 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));  in chv_hdmi_pre_enable()
1538 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);  in chv_hdmi_pre_enable()
1540 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch));  in chv_hdmi_pre_enable()
1543 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW9(ch), val);  in chv_hdmi_pre_enable()
1545 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch));  in chv_hdmi_pre_enable()
1548 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW9(ch), val);  in chv_hdmi_pre_enable()
1553 		val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i));  in chv_hdmi_pre_enable()
1556 		vlv_dpio_write(dev_priv, pipe, CHV_TX_DW4(ch, i), val);  in chv_hdmi_pre_enable()
1560 		val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i));  in chv_hdmi_pre_enable()
1563 		vlv_dpio_write(dev_priv, pipe, CHV_TX_DW2(ch, i), val);  in chv_hdmi_pre_enable()
1568 		val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i));  in chv_hdmi_pre_enable()
1570 		vlv_dpio_write(dev_priv, pipe, CHV_TX_DW3(ch, i), val);  in chv_hdmi_pre_enable()
1575 	val = vlv_dpio_read(dev_priv, pipe, VLV_TX_DW3(ch));  in chv_hdmi_pre_enable()
1576 	if (ch)  in chv_hdmi_pre_enable()
1580 	vlv_dpio_write(dev_priv, pipe, VLV_TX_DW3(ch), val);  in chv_hdmi_pre_enable()
1582 	vlv_dpio_write(dev_priv, pipe, VLV_TX_DW2(ch),  in chv_hdmi_pre_enable()
1583 			vlv_dpio_read(dev_priv, pipe, VLV_TX_DW2(ch)) |  in chv_hdmi_pre_enable()
1587 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch));  in chv_hdmi_pre_enable()
1589 	vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW10(ch), val);  in chv_hdmi_pre_enable()
1591 	val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch));  in chv_hdmi_pre_enable()
1593 	vlv_dpio_write(dev_priv, pipe, VLV_PCS23_DW10(ch), val);  in chv_hdmi_pre_enable()