150 	I915_WRITE(VIDEO_DIP_CTL, val);  in g4x_write_infoframe()
154 		I915_WRITE(VIDEO_DIP_DATA, *data);  in g4x_write_infoframe()
159 		I915_WRITE(VIDEO_DIP_DATA, 0);  in g4x_write_infoframe()
166 	I915_WRITE(VIDEO_DIP_CTL, val);  in g4x_write_infoframe()
201 	I915_WRITE(reg, val);  in ibx_write_infoframe()
205 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in ibx_write_infoframe()
210 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in ibx_write_infoframe()
217 	I915_WRITE(reg, val);  in ibx_write_infoframe()
253 	I915_WRITE(reg, val);  in cpt_write_infoframe()
257 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in cpt_write_infoframe()
262 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in cpt_write_infoframe()
269 	I915_WRITE(reg, val);  in cpt_write_infoframe()
302 	I915_WRITE(reg, val);  in vlv_write_infoframe()
306 		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), *data);  in vlv_write_infoframe()
311 		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);  in vlv_write_infoframe()
318 	I915_WRITE(reg, val);  in vlv_write_infoframe()
353 	I915_WRITE(ctl_reg, val);  in hsw_write_infoframe()
357 		I915_WRITE(data_reg + i, *data);  in hsw_write_infoframe()
362 		I915_WRITE(data_reg + i, 0);  in hsw_write_infoframe()
366 	I915_WRITE(ctl_reg, val);  in hsw_write_infoframe()
510 		I915_WRITE(reg, val);  in g4x_set_infoframes()
518 			I915_WRITE(reg, val);  in g4x_set_infoframes()
528 	I915_WRITE(reg, val);  in g4x_set_infoframes()
557 		I915_WRITE(reg, val);  in ibx_set_infoframes()
565 			I915_WRITE(reg, val);  in ibx_set_infoframes()
576 	I915_WRITE(reg, val);  in ibx_set_infoframes()
603 		I915_WRITE(reg, val);  in cpt_set_infoframes()
613 	I915_WRITE(reg, val);  in cpt_set_infoframes()
642 		I915_WRITE(reg, val);  in vlv_set_infoframes()
650 			I915_WRITE(reg, val);  in vlv_set_infoframes()
661 	I915_WRITE(reg, val);  in vlv_set_infoframes()
682 		I915_WRITE(reg, 0);  in hsw_set_infoframes()
690 	I915_WRITE(reg, val);  in hsw_set_infoframes()
730 	I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);  in intel_hdmi_prepare()
832 		I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);  in intel_enable_hdmi()
838 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_enable_hdmi()
845 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_enable_hdmi()
883 			I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
887 			I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
903 		I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);  in intel_disable_hdmi()
909 	I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
916 		I915_WRITE(intel_hdmi->hdmi_reg, temp);  in intel_disable_hdmi()
1739 		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);  in intel_hdmi_init_connector()