49 	dev_priv->fbc.enabled = false;  in i8xx_fbc_disable()
79 	dev_priv->fbc.enabled = true;  in i8xx_fbc_enable()
82 	cfb_pitch = dev_priv->fbc.uncompressed_size / FBC_LL_SIZE;  in i8xx_fbc_enable()
136 	dev_priv->fbc.enabled = true;  in g4x_fbc_enable()
158 	dev_priv->fbc.enabled = false;  in g4x_fbc_disable()
192 	dev_priv->fbc.enabled = true;  in ilk_fbc_enable()
196 		dev_priv->fbc.threshold++;  in ilk_fbc_enable()
198 	switch (dev_priv->fbc.threshold) {  in ilk_fbc_enable()
235 	dev_priv->fbc.enabled = false;  in ilk_fbc_disable()
263 	dev_priv->fbc.enabled = true;  in gen7_fbc_enable()
267 		dev_priv->fbc.threshold++;  in gen7_fbc_enable()
269 	switch (dev_priv->fbc.threshold) {  in gen7_fbc_enable()
284 	if (dev_priv->fbc.false_color)  in gen7_fbc_enable()
322 	return dev_priv->fbc.enabled;  in intel_fbc_enabled()
334 	if (work == dev_priv->fbc.fbc_work) {  in intel_fbc_work_fn()
341 			dev_priv->fbc.crtc = to_intel_crtc(work->crtc);  in intel_fbc_work_fn()
342 			dev_priv->fbc.fb_id = work->crtc->primary->fb->base.id;  in intel_fbc_work_fn()
343 			dev_priv->fbc.y = work->crtc->y;  in intel_fbc_work_fn()
346 		dev_priv->fbc.fbc_work = NULL;  in intel_fbc_work_fn()
355 	if (dev_priv->fbc.fbc_work == NULL)  in intel_fbc_cancel_work()
364 	if (cancel_delayed_work(&dev_priv->fbc.fbc_work->work))  in intel_fbc_cancel_work()
366 		kfree(dev_priv->fbc.fbc_work);  in intel_fbc_cancel_work()
373 	dev_priv->fbc.fbc_work = NULL;  in intel_fbc_cancel_work()
398 	dev_priv->fbc.fbc_work = work;  in intel_fbc_enable()
432 	dev_priv->fbc.crtc = NULL;  in intel_fbc_disable()
438 	if (dev_priv->fbc.no_fbc_reason == reason)  in set_no_fbc_reason()
441 	dev_priv->fbc.no_fbc_reason = reason;  in set_no_fbc_reason()
611 	if (dev_priv->fbc.crtc == intel_crtc &&  in intel_fbc_update()
612 	    dev_priv->fbc.fb_id == fb->base.id &&  in intel_fbc_update()
613 	    dev_priv->fbc.y == crtc->y)  in intel_fbc_update()
645 	dev_priv->fbc.no_fbc_reason = FBC_OK;  in intel_fbc_update()
667 	if (dev_priv->fbc.enabled)  in intel_fbc_invalidate()
668 		fbc_bits = INTEL_FRONTBUFFER_PRIMARY(dev_priv->fbc.crtc->pipe);  in intel_fbc_invalidate()
669 	else if (dev_priv->fbc.fbc_work)  in intel_fbc_invalidate()
671 			to_intel_crtc(dev_priv->fbc.fbc_work->crtc)->pipe);  in intel_fbc_invalidate()
673 		fbc_bits = dev_priv->fbc.possible_framebuffer_bits;  in intel_fbc_invalidate()
675 	dev_priv->fbc.busy_bits |= (fbc_bits & frontbuffer_bits);  in intel_fbc_invalidate()
677 	if (dev_priv->fbc.busy_bits)  in intel_fbc_invalidate()
686 	if (!dev_priv->fbc.busy_bits)  in intel_fbc_flush()
689 	dev_priv->fbc.busy_bits &= ~frontbuffer_bits;  in intel_fbc_flush()
691 	if (!dev_priv->fbc.busy_bits)  in intel_fbc_flush()
706 		dev_priv->fbc.enabled = false;  in intel_fbc_init()
707 		dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED;  in intel_fbc_init()
712 		dev_priv->fbc.possible_framebuffer_bits |=  in intel_fbc_init()
740 	dev_priv->fbc.enabled = dev_priv->display.fbc_enabled(dev_priv->dev);  in intel_fbc_init()