614 struct intel_dp {  struct
615 	uint32_t output_reg;
616 	uint32_t aux_ch_ctl_reg;
617 	uint32_t DP;
618 	bool has_audio;
619 	enum hdmi_force_audio force_audio;
620 	uint32_t color_range;
621 	bool color_range_auto;
622 	uint8_t link_bw;
623 	uint8_t rate_select;
624 	uint8_t lane_count;
625 	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
626 	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
627 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
629 	uint8_t num_sink_rates;
630 	int sink_rates[DP_MAX_SUPPORTED_RATES];
631 	struct drm_dp_aux aux;
632 	uint8_t train_set[4];
633 	int panel_power_up_delay;
634 	int panel_power_down_delay;
635 	int panel_power_cycle_delay;
636 	int backlight_on_delay;
637 	int backlight_off_delay;
661 	struct intel_dp_mst_encoder *mst_encoders[I915_MAX_PIPES];  argument
664 	uint32_t (*get_aux_clock_divider)(struct intel_dp *dp, int index);  argument
669 	uint32_t (*get_aux_send_ctl)(struct intel_dp *dp,  argument
790 dp_to_dig_port(struct intel_dp *intel_dp)  in dp_to_dig_port()