2977 	uint8_t train_set = intel_dp->train_set[0];  in intel_vlv_signal_levels()  local
2981 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in intel_vlv_signal_levels()
2984 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_vlv_signal_levels()
3007 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_vlv_signal_levels()
3026 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_vlv_signal_levels()
3041 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_vlv_signal_levels()
3075 	uint8_t train_set = intel_dp->train_set[0];  in intel_chv_signal_levels()  local
3080 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in intel_chv_signal_levels()
3082 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_chv_signal_levels()
3105 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_chv_signal_levels()
3123 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_chv_signal_levels()
3137 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_chv_signal_levels()
3198 	if (((train_set & DP_TRAIN_PRE_EMPHASIS_MASK)  in intel_chv_signal_levels()
3200 		((train_set & DP_TRAIN_VOLTAGE_SWING_MASK)  in intel_chv_signal_levels()
3271 		intel_dp->train_set[lane] = v | p;  in intel_get_adjust_train()
3275 intel_gen4_signal_levels(uint8_t train_set)  in intel_gen4_signal_levels()  argument
3279 	switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in intel_gen4_signal_levels()
3294 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in intel_gen4_signal_levels()
3314 intel_gen6_edp_signal_levels(uint8_t train_set)  in intel_gen6_edp_signal_levels()  argument
3316 	int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in intel_gen6_edp_signal_levels()
3342 intel_gen7_edp_signal_levels(uint8_t train_set)  in intel_gen7_edp_signal_levels()  argument
3344 	int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in intel_gen7_edp_signal_levels()
3373 intel_hsw_signal_levels(uint8_t train_set)  in intel_hsw_signal_levels()  argument
3375 	int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in intel_hsw_signal_levels()
3416 	uint8_t train_set = intel_dp->train_set[0];  in intel_dp_set_signal_levels()  local
3419 		signal_levels = intel_hsw_signal_levels(train_set);  in intel_dp_set_signal_levels()
3428 		signal_levels = intel_gen7_edp_signal_levels(train_set);  in intel_dp_set_signal_levels()
3431 		signal_levels = intel_gen6_edp_signal_levels(train_set);  in intel_dp_set_signal_levels()
3434 		signal_levels = intel_gen4_signal_levels(train_set);  in intel_dp_set_signal_levels()
3451 	uint8_t buf[sizeof(intel_dp->train_set) + 1];  in intel_dp_set_link_train()
3466 		memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);  in intel_dp_set_link_train()
3480 	memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));  in intel_dp_reset_link_train()
3501 				intel_dp->train_set, intel_dp->lane_count);  in intel_dp_update_link_train()
3595 			if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0)  in intel_dp_start_link_train()
3611 		if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {  in intel_dp_start_link_train()
3619 		voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;  in intel_dp_start_link_train()