1335 	struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);  in intel_dp_compute_config()
1488 	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);  in ironlake_set_pll_cpu_edp()
1522 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);  in intel_dp_prepare()
2079 			     to_intel_crtc(crtc)->pipe);  in ironlake_edp_pll_on()
2105 			     to_intel_crtc(crtc)->pipe);  in ironlake_edp_pll_off()
2219 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);  in intel_dp_get_config()
2299 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);  in intel_disable_dp()
2343 		to_intel_crtc(encoder->base.crtc);  in chv_post_disable_dp()
2484 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);  in intel_enable_dp()
2617 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);  in vlv_init_panel_power_sequencer()
2658 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);  in vlv_pre_enable_dp()
2687 		to_intel_crtc(encoder->base.crtc);  in vlv_dp_pre_pll_enable()
2718 		to_intel_crtc(encoder->base.crtc);  in chv_pre_enable_dp()
2774 		to_intel_crtc(encoder->base.crtc);  in chv_dp_pre_pll_enable()
2974 		to_intel_crtc(dport->base.base.crtc);  in intel_vlv_signal_levels()
3073 	struct intel_crtc *intel_crtc = to_intel_crtc(dport->base.base.crtc);  in intel_chv_signal_levels()
3899 		to_intel_crtc(intel_dig_port->base.base.crtc);  in intel_dp_sink_crc()
4055 	if (!to_intel_crtc(intel_encoder->base.crtc)->active)  in intel_dp_check_link_status()
5012 	intel_crtc = to_intel_crtc(encoder->base.crtc);  in intel_dp_set_drrs_state()
5088 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in intel_edp_drrs_enable()
5120 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);  in intel_edp_drrs_disable()
5202 	pipe = to_intel_crtc(crtc)->pipe;  in intel_edp_drrs_invalidate()
5246 	pipe = to_intel_crtc(crtc)->pipe;  in intel_edp_drrs_flush()