587 	u32 pp_div;  in edp_notify_handler()  local
600 		pp_div = I915_READ(pp_div_reg);  in edp_notify_handler()
601 		pp_div &= PP_REFERENCE_DIVIDER_MASK;  in edp_notify_handler()
604 		I915_WRITE(pp_div_reg, pp_div | 0x1F);  in edp_notify_handler()
4810 	u32 pp_on, pp_off, pp_div, pp;  in intel_dp_init_panel_power_sequencer()  local
4840 	pp_div = I915_READ(pp_div_reg);  in intel_dp_init_panel_power_sequencer()
4855 	cur.t11_t12 = ((pp_div & PANEL_POWER_CYCLE_DELAY_MASK) >>  in intel_dp_init_panel_power_sequencer()
4911 	u32 pp_on, pp_off, pp_div, port_sel = 0;  in intel_dp_init_panel_power_sequencer_registers()  local
4945 	pp_div = ((100 * div)/2 - 1) << PP_REFERENCE_DIVIDER_SHIFT;  in intel_dp_init_panel_power_sequencer_registers()
4946 	pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000)  in intel_dp_init_panel_power_sequencer_registers()
4964 	I915_WRITE(pp_div_reg, pp_div);  in intel_dp_init_panel_power_sequencer_registers()