588 	u32 pp_ctrl_reg, pp_div_reg;  in edp_notify_handler()  local
598 		pp_ctrl_reg = VLV_PIPE_PP_CONTROL(pipe);  in edp_notify_handler()
605 		I915_WRITE(pp_ctrl_reg, PANEL_UNLOCK_REGS | PANEL_POWER_OFF);  in edp_notify_handler()
1606 	u32 pp_stat_reg, pp_ctrl_reg;  in wait_panel_status()  local
1611 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in wait_panel_status()
1616 			I915_READ(pp_ctrl_reg));  in wait_panel_status()
1621 				I915_READ(pp_ctrl_reg));  in wait_panel_status()
1694 	u32 pp_stat_reg, pp_ctrl_reg;  in edp_panel_vdd_on()  local
1721 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_vdd_on()
1723 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_vdd_on()
1724 	POSTING_READ(pp_ctrl_reg);  in edp_panel_vdd_on()
1726 			I915_READ(pp_stat_reg), I915_READ(pp_ctrl_reg));  in edp_panel_vdd_on()
1770 	u32 pp_stat_reg, pp_ctrl_reg;  in edp_panel_vdd_off_sync()  local
1785 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_vdd_off_sync()
1788 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_vdd_off_sync()
1789 	POSTING_READ(pp_ctrl_reg);  in edp_panel_vdd_off_sync()
1793 	I915_READ(pp_stat_reg), I915_READ(pp_ctrl_reg));  in edp_panel_vdd_off_sync()
1857 	u32 pp_ctrl_reg;  in edp_panel_on()  local
1874 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_on()
1879 		I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1880 		POSTING_READ(pp_ctrl_reg);  in edp_panel_on()
1887 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1888 	POSTING_READ(pp_ctrl_reg);  in edp_panel_on()
1895 		I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1896 		POSTING_READ(pp_ctrl_reg);  in edp_panel_on()
1919 	u32 pp_ctrl_reg;  in edp_panel_off()  local
1938 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_off()
1942 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_off()
1943 	POSTING_READ(pp_ctrl_reg);  in edp_panel_off()
1970 	u32 pp_ctrl_reg;  in _intel_edp_backlight_on()  local
1985 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in _intel_edp_backlight_on()
1987 	I915_WRITE(pp_ctrl_reg, pp);  in _intel_edp_backlight_on()
1988 	POSTING_READ(pp_ctrl_reg);  in _intel_edp_backlight_on()
2011 	u32 pp_ctrl_reg;  in _intel_edp_backlight_off()  local
2021 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in _intel_edp_backlight_off()
2023 	I915_WRITE(pp_ctrl_reg, pp);  in _intel_edp_backlight_off()
2024 	POSTING_READ(pp_ctrl_reg);  in _intel_edp_backlight_off()
4811 	int pp_ctrl_reg, pp_on_reg, pp_off_reg, pp_div_reg;  in intel_dp_init_panel_power_sequencer()  local
4820 		pp_ctrl_reg = PCH_PP_CONTROL;  in intel_dp_init_panel_power_sequencer()
4827 		pp_ctrl_reg = VLV_PIPE_PP_CONTROL(pipe);  in intel_dp_init_panel_power_sequencer()
4836 	I915_WRITE(pp_ctrl_reg, pp);  in intel_dp_init_panel_power_sequencer()