Lines Matching refs:margin_reg_value
3074 u32 deemph_reg_value, margin_reg_value, val; in intel_chv_signal_levels() local
3085 margin_reg_value = 52; in intel_chv_signal_levels()
3089 margin_reg_value = 77; in intel_chv_signal_levels()
3093 margin_reg_value = 102; in intel_chv_signal_levels()
3097 margin_reg_value = 154; in intel_chv_signal_levels()
3108 margin_reg_value = 78; in intel_chv_signal_levels()
3112 margin_reg_value = 116; in intel_chv_signal_levels()
3116 margin_reg_value = 154; in intel_chv_signal_levels()
3126 margin_reg_value = 104; in intel_chv_signal_levels()
3130 margin_reg_value = 154; in intel_chv_signal_levels()
3140 margin_reg_value = 154; in intel_chv_signal_levels()
3187 val |= margin_reg_value << DPIO_SWING_MARGIN000_SHIFT; in intel_chv_signal_levels()