Lines Matching refs:intel_dp
102 static bool is_edp(struct intel_dp *intel_dp) in is_edp() argument
104 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in is_edp()
109 static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp) in intel_dp_to_dev() argument
111 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_to_dev()
116 static struct intel_dp *intel_attached_dp(struct drm_connector *connector) in intel_attached_dp()
121 static void intel_dp_link_down(struct intel_dp *intel_dp);
122 static bool edp_panel_vdd_on(struct intel_dp *intel_dp);
123 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
124 static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
129 intel_dp_max_link_bw(struct intel_dp *intel_dp) in intel_dp_max_link_bw() argument
131 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in intel_dp_max_link_bw()
147 static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) in intel_dp_max_lane_count() argument
149 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_max_lane_count()
158 sink_max = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_max_lane_count()
196 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_mode_valid() local
202 if (is_edp(intel_dp) && fixed_mode) { in intel_dp_mode_valid()
212 max_link_clock = intel_dp_max_link_rate(intel_dp); in intel_dp_mode_valid()
213 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mode_valid()
287 struct intel_dp *intel_dp);
290 struct intel_dp *intel_dp);
292 static void pps_lock(struct intel_dp *intel_dp) in pps_lock() argument
294 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in pps_lock()
310 static void pps_unlock(struct intel_dp *intel_dp) in pps_unlock() argument
312 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in pps_unlock()
325 vlv_power_sequencer_kick(struct intel_dp *intel_dp) in vlv_power_sequencer_kick() argument
327 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_kick()
330 enum pipe pipe = intel_dp->pps_pipe; in vlv_power_sequencer_kick()
334 if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, in vlv_power_sequencer_kick()
345 DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
371 I915_WRITE(intel_dp->output_reg, DP); in vlv_power_sequencer_kick()
372 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
374 I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick()
375 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
377 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick()
378 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
385 vlv_power_sequencer_pipe(struct intel_dp *intel_dp) in vlv_power_sequencer_pipe() argument
387 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_pipe()
397 WARN_ON(!is_edp(intel_dp)); in vlv_power_sequencer_pipe()
399 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
400 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
408 struct intel_dp *tmp; in vlv_power_sequencer_pipe()
429 intel_dp->pps_pipe = pipe; in vlv_power_sequencer_pipe()
432 pipe_name(intel_dp->pps_pipe), in vlv_power_sequencer_pipe()
436 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_power_sequencer_pipe()
437 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_power_sequencer_pipe()
443 vlv_power_sequencer_kick(intel_dp); in vlv_power_sequencer_pipe()
445 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
493 vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) in vlv_initial_power_sequencer_setup() argument
495 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_initial_power_sequencer_setup()
504 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
507 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
508 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
511 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
512 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
516 if (intel_dp->pps_pipe == INVALID_PIPE) { in vlv_initial_power_sequencer_setup()
523 port_name(port), pipe_name(intel_dp->pps_pipe)); in vlv_initial_power_sequencer_setup()
525 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_initial_power_sequencer_setup()
526 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_initial_power_sequencer_setup()
548 struct intel_dp *intel_dp; in vlv_power_sequencer_reset() local
553 intel_dp = enc_to_intel_dp(&encoder->base); in vlv_power_sequencer_reset()
554 intel_dp->pps_pipe = INVALID_PIPE; in vlv_power_sequencer_reset()
558 static u32 _pp_ctrl_reg(struct intel_dp *intel_dp) in _pp_ctrl_reg() argument
560 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _pp_ctrl_reg()
565 return VLV_PIPE_PP_CONTROL(vlv_power_sequencer_pipe(intel_dp)); in _pp_ctrl_reg()
568 static u32 _pp_stat_reg(struct intel_dp *intel_dp) in _pp_stat_reg() argument
570 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _pp_stat_reg()
575 return VLV_PIPE_PP_STATUS(vlv_power_sequencer_pipe(intel_dp)); in _pp_stat_reg()
583 struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), in edp_notify_handler() local
585 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_notify_handler()
590 if (!is_edp(intel_dp) || code != SYS_RESTART) in edp_notify_handler()
593 pps_lock(intel_dp); in edp_notify_handler()
596 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in edp_notify_handler()
606 msleep(intel_dp->panel_power_cycle_delay); in edp_notify_handler()
609 pps_unlock(intel_dp); in edp_notify_handler()
614 static bool edp_have_panel_power(struct intel_dp *intel_dp) in edp_have_panel_power() argument
616 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_have_panel_power()
622 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_power()
625 return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power()
628 static bool edp_have_panel_vdd(struct intel_dp *intel_dp) in edp_have_panel_vdd() argument
630 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_have_panel_vdd()
636 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_vdd()
639 return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD; in edp_have_panel_vdd()
643 intel_dp_check_edp(struct intel_dp *intel_dp) in intel_dp_check_edp() argument
645 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_check_edp()
648 if (!is_edp(intel_dp)) in intel_dp_check_edp()
651 if (!edp_have_panel_power(intel_dp) && !edp_have_panel_vdd(intel_dp)) { in intel_dp_check_edp()
654 I915_READ(_pp_stat_reg(intel_dp)), in intel_dp_check_edp()
655 I915_READ(_pp_ctrl_reg(intel_dp))); in intel_dp_check_edp()
660 intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) in intel_dp_aux_wait_done() argument
662 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_wait_done()
665 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_wait_done()
683 static uint32_t i9xx_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in i9xx_get_aux_clock_divider() argument
685 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in i9xx_get_aux_clock_divider()
695 static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in ilk_get_aux_clock_divider() argument
697 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ilk_get_aux_clock_divider()
713 static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in hsw_get_aux_clock_divider() argument
715 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in hsw_get_aux_clock_divider()
735 static uint32_t vlv_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in vlv_get_aux_clock_divider() argument
740 static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in skl_get_aux_clock_divider() argument
750 static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, in i9xx_get_aux_send_ctl() argument
755 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in i9xx_get_aux_send_ctl()
764 if (IS_BROADWELL(dev) && intel_dp->aux_ch_ctl_reg == DPA_AUX_CH_CTL) in i9xx_get_aux_send_ctl()
780 static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp, in skl_get_aux_send_ctl() argument
796 intel_dp_aux_ch(struct intel_dp *intel_dp, in intel_dp_aux_ch() argument
800 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_ch()
803 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_ch()
812 pps_lock(intel_dp); in intel_dp_aux_ch()
820 vdd = edp_panel_vdd_on(intel_dp); in intel_dp_aux_ch()
828 intel_dp_check_edp(intel_dp); in intel_dp_aux_ch()
853 while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) { in intel_dp_aux_ch()
854 u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp, in intel_dp_aux_ch()
870 status = intel_dp_aux_wait_done(intel_dp, has_aux_irq); in intel_dp_aux_ch()
927 edp_panel_vdd_off(intel_dp, false); in intel_dp_aux_ch()
929 pps_unlock(intel_dp); in intel_dp_aux_ch()
939 struct intel_dp *intel_dp = container_of(aux, struct intel_dp, aux); in intel_dp_aux_transfer() local
961 ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize); in intel_dp_aux_transfer()
983 ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize); in intel_dp_aux_transfer()
1006 intel_dp_aux_init(struct intel_dp *intel_dp, struct intel_connector *connector) in intel_dp_aux_init() argument
1008 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_aux_init()
1009 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_init()
1016 intel_dp->aux_ch_ctl_reg = DPA_AUX_CH_CTL; in intel_dp_aux_init()
1020 intel_dp->aux_ch_ctl_reg = PCH_DPB_AUX_CH_CTL; in intel_dp_aux_init()
1024 intel_dp->aux_ch_ctl_reg = PCH_DPC_AUX_CH_CTL; in intel_dp_aux_init()
1028 intel_dp->aux_ch_ctl_reg = PCH_DPD_AUX_CH_CTL; in intel_dp_aux_init()
1045 intel_dp->aux_ch_ctl_reg = intel_dp->output_reg + 0x10; in intel_dp_aux_init()
1047 intel_dp->aux.name = name; in intel_dp_aux_init()
1048 intel_dp->aux.dev = dev->dev; in intel_dp_aux_init()
1049 intel_dp->aux.transfer = intel_dp_aux_transfer; in intel_dp_aux_init()
1054 ret = drm_dp_aux_register(&intel_dp->aux); in intel_dp_aux_init()
1062 &intel_dp->aux.ddc.dev.kobj, in intel_dp_aux_init()
1063 intel_dp->aux.ddc.dev.kobj.name); in intel_dp_aux_init()
1066 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_aux_init()
1073 struct intel_dp *intel_dp = intel_attached_dp(&intel_connector->base); in intel_dp_connector_unregister() local
1077 intel_dp->aux.ddc.dev.kobj.name); in intel_dp_connector_unregister()
1141 intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) in intel_dp_sink_rates() argument
1143 if (intel_dp->num_sink_rates) { in intel_dp_sink_rates()
1144 *sink_rates = intel_dp->sink_rates; in intel_dp_sink_rates()
1145 return intel_dp->num_sink_rates; in intel_dp_sink_rates()
1150 return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; in intel_dp_sink_rates()
1242 static int intel_dp_common_rates(struct intel_dp *intel_dp, in intel_dp_common_rates() argument
1245 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_common_rates()
1249 sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); in intel_dp_common_rates()
1273 static void intel_dp_print_rates(struct intel_dp *intel_dp) in intel_dp_print_rates() argument
1275 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_print_rates()
1288 sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); in intel_dp_print_rates()
1292 common_len = intel_dp_common_rates(intel_dp, common_rates); in intel_dp_print_rates()
1309 intel_dp_max_link_rate(struct intel_dp *intel_dp) in intel_dp_max_link_rate() argument
1314 len = intel_dp_common_rates(intel_dp, rates); in intel_dp_max_link_rate()
1321 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate) in intel_dp_rate_select() argument
1323 return rate_to_index(rate, intel_dp->sink_rates); in intel_dp_rate_select()
1333 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_compute_config() local
1334 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_compute_config()
1336 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_compute_config()
1339 int max_lane_count = intel_dp_max_lane_count(intel_dp); in intel_dp_compute_config()
1348 common_len = intel_dp_common_rates(intel_dp, common_rates); in intel_dp_compute_config()
1360 pipe_config->has_audio = intel_dp->has_audio && port != PORT_A; in intel_dp_compute_config()
1362 if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) { in intel_dp_compute_config()
1384 if (is_edp(intel_dp)) { in intel_dp_compute_config()
1425 if (intel_dp->color_range_auto) { in intel_dp_compute_config()
1432 intel_dp->color_range = DP_COLOR_RANGE_16_235; in intel_dp_compute_config()
1434 intel_dp->color_range = 0; in intel_dp_compute_config()
1437 if (intel_dp->color_range) in intel_dp_compute_config()
1440 intel_dp->lane_count = lane_count; in intel_dp_compute_config()
1442 if (intel_dp->num_sink_rates) { in intel_dp_compute_config()
1443 intel_dp->link_bw = 0; in intel_dp_compute_config()
1444 intel_dp->rate_select = in intel_dp_compute_config()
1445 intel_dp_rate_select(intel_dp, common_rates[clock]); in intel_dp_compute_config()
1447 intel_dp->link_bw = in intel_dp_compute_config()
1449 intel_dp->rate_select = 0; in intel_dp_compute_config()
1456 intel_dp->link_bw, intel_dp->lane_count, in intel_dp_compute_config()
1475 if (IS_SKYLAKE(dev) && is_edp(intel_dp)) in intel_dp_compute_config()
1478 hsw_dp_set_ddi_pll_sel(pipe_config, intel_dp->link_bw); in intel_dp_compute_config()
1480 intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw); in intel_dp_compute_config()
1485 static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp) in ironlake_set_pll_cpu_edp() argument
1487 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in ironlake_set_pll_cpu_edp()
1504 intel_dp->DP |= DP_PLL_FREQ_160MHZ; in ironlake_set_pll_cpu_edp()
1507 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_set_pll_cpu_edp()
1520 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_prepare() local
1521 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_prepare()
1545 intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
1548 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare()
1549 intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count); in intel_dp_prepare()
1552 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in intel_dp_prepare()
1558 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1560 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1561 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1563 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1564 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1566 intel_dp->DP |= crtc->pipe << 29; in intel_dp_prepare()
1569 intel_dp->DP |= intel_dp->color_range; in intel_dp_prepare()
1572 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1574 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1575 intel_dp->DP |= DP_LINK_TRAIN_OFF; in intel_dp_prepare()
1577 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1578 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1582 intel_dp->DP |= DP_PIPEB_SELECT; in intel_dp_prepare()
1584 intel_dp->DP |= DP_PIPE_SELECT_CHV(crtc->pipe); in intel_dp_prepare()
1587 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1600 static void wait_panel_status(struct intel_dp *intel_dp, in wait_panel_status() argument
1604 struct drm_device *dev = intel_dp_to_dev(intel_dp); in wait_panel_status()
1610 pp_stat_reg = _pp_stat_reg(intel_dp); in wait_panel_status()
1611 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in wait_panel_status()
1627 static void wait_panel_on(struct intel_dp *intel_dp) in wait_panel_on() argument
1630 wait_panel_status(intel_dp, IDLE_ON_MASK, IDLE_ON_VALUE); in wait_panel_on()
1633 static void wait_panel_off(struct intel_dp *intel_dp) in wait_panel_off() argument
1636 wait_panel_status(intel_dp, IDLE_OFF_MASK, IDLE_OFF_VALUE); in wait_panel_off()
1639 static void wait_panel_power_cycle(struct intel_dp *intel_dp) in wait_panel_power_cycle() argument
1645 wait_remaining_ms_from_jiffies(intel_dp->last_power_cycle, in wait_panel_power_cycle()
1646 intel_dp->panel_power_cycle_delay); in wait_panel_power_cycle()
1648 wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); in wait_panel_power_cycle()
1651 static void wait_backlight_on(struct intel_dp *intel_dp) in wait_backlight_on() argument
1653 wait_remaining_ms_from_jiffies(intel_dp->last_power_on, in wait_backlight_on()
1654 intel_dp->backlight_on_delay); in wait_backlight_on()
1657 static void edp_wait_backlight_off(struct intel_dp *intel_dp) in edp_wait_backlight_off() argument
1659 wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, in edp_wait_backlight_off()
1660 intel_dp->backlight_off_delay); in edp_wait_backlight_off()
1667 static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) in ironlake_get_pp_control() argument
1669 struct drm_device *dev = intel_dp_to_dev(intel_dp); in ironlake_get_pp_control()
1675 control = I915_READ(_pp_ctrl_reg(intel_dp)); in ironlake_get_pp_control()
1686 static bool edp_panel_vdd_on(struct intel_dp *intel_dp) in edp_panel_vdd_on() argument
1688 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_vdd_on()
1689 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in edp_panel_vdd_on()
1695 bool need_to_disable = !intel_dp->want_panel_vdd; in edp_panel_vdd_on()
1699 if (!is_edp(intel_dp)) in edp_panel_vdd_on()
1702 cancel_delayed_work(&intel_dp->panel_vdd_work); in edp_panel_vdd_on()
1703 intel_dp->want_panel_vdd = true; in edp_panel_vdd_on()
1705 if (edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_on()
1714 if (!edp_have_panel_power(intel_dp)) in edp_panel_vdd_on()
1715 wait_panel_power_cycle(intel_dp); in edp_panel_vdd_on()
1717 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_on()
1720 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_on()
1721 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_on()
1730 if (!edp_have_panel_power(intel_dp)) { in edp_panel_vdd_on()
1733 msleep(intel_dp->panel_power_up_delay); in edp_panel_vdd_on()
1746 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) in intel_edp_panel_vdd_on() argument
1750 if (!is_edp(intel_dp)) in intel_edp_panel_vdd_on()
1753 pps_lock(intel_dp); in intel_edp_panel_vdd_on()
1754 vdd = edp_panel_vdd_on(intel_dp); in intel_edp_panel_vdd_on()
1755 pps_unlock(intel_dp); in intel_edp_panel_vdd_on()
1758 port_name(dp_to_dig_port(intel_dp)->port)); in intel_edp_panel_vdd_on()
1761 static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) in edp_panel_vdd_off_sync() argument
1763 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_vdd_off_sync()
1766 dp_to_dig_port(intel_dp); in edp_panel_vdd_off_sync()
1774 WARN_ON(intel_dp->want_panel_vdd); in edp_panel_vdd_off_sync()
1776 if (!edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_off_sync()
1782 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_off_sync()
1785 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_off_sync()
1786 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_off_sync()
1796 intel_dp->last_power_cycle = jiffies; in edp_panel_vdd_off_sync()
1804 struct intel_dp *intel_dp = container_of(to_delayed_work(__work), in edp_panel_vdd_work() local
1805 struct intel_dp, panel_vdd_work); in edp_panel_vdd_work()
1807 pps_lock(intel_dp); in edp_panel_vdd_work()
1808 if (!intel_dp->want_panel_vdd) in edp_panel_vdd_work()
1809 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_work()
1810 pps_unlock(intel_dp); in edp_panel_vdd_work()
1813 static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) in edp_panel_vdd_schedule_off() argument
1822 delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); in edp_panel_vdd_schedule_off()
1823 schedule_delayed_work(&intel_dp->panel_vdd_work, delay); in edp_panel_vdd_schedule_off()
1831 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) in edp_panel_vdd_off() argument
1834 intel_dp_to_dev(intel_dp)->dev_private; in edp_panel_vdd_off()
1838 if (!is_edp(intel_dp)) in edp_panel_vdd_off()
1841 I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", in edp_panel_vdd_off()
1842 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_vdd_off()
1844 intel_dp->want_panel_vdd = false; in edp_panel_vdd_off()
1847 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_off()
1849 edp_panel_vdd_schedule_off(intel_dp); in edp_panel_vdd_off()
1852 static void edp_panel_on(struct intel_dp *intel_dp) in edp_panel_on() argument
1854 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_on()
1861 if (!is_edp(intel_dp)) in edp_panel_on()
1865 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_on()
1867 if (WARN(edp_have_panel_power(intel_dp), in edp_panel_on()
1869 port_name(dp_to_dig_port(intel_dp)->port))) in edp_panel_on()
1872 wait_panel_power_cycle(intel_dp); in edp_panel_on()
1874 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_on()
1875 pp = ironlake_get_pp_control(intel_dp); in edp_panel_on()
1890 wait_panel_on(intel_dp); in edp_panel_on()
1891 intel_dp->last_power_on = jiffies; in edp_panel_on()
1900 void intel_edp_panel_on(struct intel_dp *intel_dp) in intel_edp_panel_on() argument
1902 if (!is_edp(intel_dp)) in intel_edp_panel_on()
1905 pps_lock(intel_dp); in intel_edp_panel_on()
1906 edp_panel_on(intel_dp); in intel_edp_panel_on()
1907 pps_unlock(intel_dp); in intel_edp_panel_on()
1911 static void edp_panel_off(struct intel_dp *intel_dp) in edp_panel_off() argument
1913 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in edp_panel_off()
1915 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_off()
1923 if (!is_edp(intel_dp)) in edp_panel_off()
1927 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_off()
1929 WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", in edp_panel_off()
1930 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_off()
1932 pp = ironlake_get_pp_control(intel_dp); in edp_panel_off()
1938 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_off()
1940 intel_dp->want_panel_vdd = false; in edp_panel_off()
1945 intel_dp->last_power_cycle = jiffies; in edp_panel_off()
1946 wait_panel_off(intel_dp); in edp_panel_off()
1953 void intel_edp_panel_off(struct intel_dp *intel_dp) in intel_edp_panel_off() argument
1955 if (!is_edp(intel_dp)) in intel_edp_panel_off()
1958 pps_lock(intel_dp); in intel_edp_panel_off()
1959 edp_panel_off(intel_dp); in intel_edp_panel_off()
1960 pps_unlock(intel_dp); in intel_edp_panel_off()
1964 static void _intel_edp_backlight_on(struct intel_dp *intel_dp) in _intel_edp_backlight_on() argument
1966 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in _intel_edp_backlight_on()
1978 wait_backlight_on(intel_dp); in _intel_edp_backlight_on()
1980 pps_lock(intel_dp); in _intel_edp_backlight_on()
1982 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_on()
1985 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_on()
1990 pps_unlock(intel_dp); in _intel_edp_backlight_on()
1994 void intel_edp_backlight_on(struct intel_dp *intel_dp) in intel_edp_backlight_on() argument
1996 if (!is_edp(intel_dp)) in intel_edp_backlight_on()
2001 intel_panel_enable_backlight(intel_dp->attached_connector); in intel_edp_backlight_on()
2002 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_on()
2006 static void _intel_edp_backlight_off(struct intel_dp *intel_dp) in _intel_edp_backlight_off() argument
2008 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _intel_edp_backlight_off()
2013 if (!is_edp(intel_dp)) in _intel_edp_backlight_off()
2016 pps_lock(intel_dp); in _intel_edp_backlight_off()
2018 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_off()
2021 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_off()
2026 pps_unlock(intel_dp); in _intel_edp_backlight_off()
2028 intel_dp->last_backlight_off = jiffies; in _intel_edp_backlight_off()
2029 edp_wait_backlight_off(intel_dp); in _intel_edp_backlight_off()
2033 void intel_edp_backlight_off(struct intel_dp *intel_dp) in intel_edp_backlight_off() argument
2035 if (!is_edp(intel_dp)) in intel_edp_backlight_off()
2040 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_off()
2041 intel_panel_disable_backlight(intel_dp->attached_connector); in intel_edp_backlight_off()
2051 struct intel_dp *intel_dp = intel_attached_dp(&connector->base); in intel_edp_backlight_power() local
2054 pps_lock(intel_dp); in intel_edp_backlight_power()
2055 is_enabled = ironlake_get_pp_control(intel_dp) & EDP_BLC_ENABLE; in intel_edp_backlight_power()
2056 pps_unlock(intel_dp); in intel_edp_backlight_power()
2065 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_power()
2067 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_power()
2070 static void ironlake_edp_pll_on(struct intel_dp *intel_dp) in ironlake_edp_pll_on() argument
2072 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_edp_pll_on()
2089 intel_dp->DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE); in ironlake_edp_pll_on()
2090 intel_dp->DP |= DP_PLL_ENABLE; in ironlake_edp_pll_on()
2091 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2096 static void ironlake_edp_pll_off(struct intel_dp *intel_dp) in ironlake_edp_pll_off() argument
2098 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_edp_pll_off()
2122 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) in intel_dp_sink_dpms() argument
2127 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_sink_dpms()
2131 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2139 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2155 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_hw_state() local
2156 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_get_hw_state()
2166 tmp = I915_READ(intel_dp->output_reg); in intel_dp_get_hw_state()
2182 switch (intel_dp->output_reg) { in intel_dp_get_hw_state()
2205 intel_dp->output_reg); in intel_dp_get_hw_state()
2214 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_config() local
2218 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_get_config()
2222 tmp = I915_READ(intel_dp->output_reg); in intel_dp_get_config()
2274 if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && in intel_dp_get_config()
2297 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_disable_dp() local
2305 intel_psr_disable(intel_dp); in intel_disable_dp()
2309 intel_edp_panel_vdd_on(intel_dp); in intel_disable_dp()
2310 intel_edp_backlight_off(intel_dp); in intel_disable_dp()
2311 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); in intel_disable_dp()
2312 intel_edp_panel_off(intel_dp); in intel_disable_dp()
2316 intel_dp_link_down(intel_dp); in intel_disable_dp()
2321 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in ilk_post_disable_dp() local
2322 enum port port = dp_to_dig_port(intel_dp)->port; in ilk_post_disable_dp()
2324 intel_dp_link_down(intel_dp); in ilk_post_disable_dp()
2326 ironlake_edp_pll_off(intel_dp); in ilk_post_disable_dp()
2331 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_post_disable_dp() local
2333 intel_dp_link_down(intel_dp); in vlv_post_disable_dp()
2338 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in chv_post_disable_dp() local
2339 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in chv_post_disable_dp()
2348 intel_dp_link_down(intel_dp); in chv_post_disable_dp()
2373 _intel_dp_set_link_train(struct intel_dp *intel_dp, in _intel_dp_set_link_train() argument
2377 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in _intel_dp_set_link_train()
2455 static void intel_dp_enable_port(struct intel_dp *intel_dp) in intel_dp_enable_port() argument
2457 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_enable_port()
2461 _intel_dp_set_link_train(intel_dp, &intel_dp->DP, in intel_dp_enable_port()
2464 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
2465 POSTING_READ(intel_dp->output_reg); in intel_dp_enable_port()
2473 intel_dp->DP |= DP_PORT_EN; in intel_dp_enable_port()
2475 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
2476 POSTING_READ(intel_dp->output_reg); in intel_dp_enable_port()
2481 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_enable_dp() local
2485 uint32_t dp_reg = I915_READ(intel_dp->output_reg); in intel_enable_dp()
2490 pps_lock(intel_dp); in intel_enable_dp()
2493 vlv_init_panel_power_sequencer(intel_dp); in intel_enable_dp()
2495 intel_dp_enable_port(intel_dp); in intel_enable_dp()
2497 edp_panel_vdd_on(intel_dp); in intel_enable_dp()
2498 edp_panel_on(intel_dp); in intel_enable_dp()
2499 edp_panel_vdd_off(intel_dp, true); in intel_enable_dp()
2501 pps_unlock(intel_dp); in intel_enable_dp()
2504 vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp)); in intel_enable_dp()
2506 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); in intel_enable_dp()
2507 intel_dp_start_link_train(intel_dp); in intel_enable_dp()
2508 intel_dp_complete_link_train(intel_dp); in intel_enable_dp()
2509 intel_dp_stop_link_train(intel_dp); in intel_enable_dp()
2520 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_enable_dp() local
2523 intel_edp_backlight_on(intel_dp); in g4x_enable_dp()
2528 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_enable_dp() local
2530 intel_edp_backlight_on(intel_dp); in vlv_enable_dp()
2531 intel_psr_enable(intel_dp); in vlv_enable_dp()
2536 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_pre_enable_dp() local
2537 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in g4x_pre_enable_dp()
2543 ironlake_set_pll_cpu_edp(intel_dp); in g4x_pre_enable_dp()
2544 ironlake_edp_pll_on(intel_dp); in g4x_pre_enable_dp()
2548 static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) in vlv_detach_power_sequencer() argument
2550 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_detach_power_sequencer()
2552 enum pipe pipe = intel_dp->pps_pipe; in vlv_detach_power_sequencer()
2555 edp_panel_vdd_off_sync(intel_dp); in vlv_detach_power_sequencer()
2571 intel_dp->pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
2587 struct intel_dp *intel_dp; in vlv_steal_power_sequencer() local
2593 intel_dp = enc_to_intel_dp(&encoder->base); in vlv_steal_power_sequencer()
2594 port = dp_to_dig_port(intel_dp)->port; in vlv_steal_power_sequencer()
2596 if (intel_dp->pps_pipe != pipe) in vlv_steal_power_sequencer()
2607 vlv_detach_power_sequencer(intel_dp); in vlv_steal_power_sequencer()
2611 static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp) in vlv_init_panel_power_sequencer() argument
2613 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_init_panel_power_sequencer()
2621 if (!is_edp(intel_dp)) in vlv_init_panel_power_sequencer()
2624 if (intel_dp->pps_pipe == crtc->pipe) in vlv_init_panel_power_sequencer()
2632 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_init_panel_power_sequencer()
2633 vlv_detach_power_sequencer(intel_dp); in vlv_init_panel_power_sequencer()
2642 intel_dp->pps_pipe = crtc->pipe; in vlv_init_panel_power_sequencer()
2645 pipe_name(intel_dp->pps_pipe), port_name(intel_dig_port->port)); in vlv_init_panel_power_sequencer()
2648 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_init_panel_power_sequencer()
2649 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_init_panel_power_sequencer()
2654 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_pre_enable_dp() local
2655 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in vlv_pre_enable_dp()
2713 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in chv_pre_enable_dp() local
2714 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in chv_pre_enable_dp()
2870 intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) in intel_dp_get_link_status() argument
2872 return intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_link_status()
2880 intel_dp_voltage_max(struct intel_dp *intel_dp) in intel_dp_voltage_max() argument
2882 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_voltage_max()
2884 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_voltage_max()
2901 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) in intel_dp_pre_emphasis_max() argument
2903 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_pre_emphasis_max()
2904 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_pre_emphasis_max()
2968 static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp) in intel_vlv_signal_levels() argument
2970 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_vlv_signal_levels()
2972 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in intel_vlv_signal_levels()
2977 uint8_t train_set = intel_dp->train_set[0]; in intel_vlv_signal_levels()
3068 static uint32_t intel_chv_signal_levels(struct intel_dp *intel_dp) in intel_chv_signal_levels() argument
3070 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_chv_signal_levels()
3072 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in intel_chv_signal_levels()
3075 uint8_t train_set = intel_dp->train_set[0]; in intel_chv_signal_levels()
3243 intel_get_adjust_train(struct intel_dp *intel_dp, in intel_get_adjust_train() argument
3252 for (lane = 0; lane < intel_dp->lane_count; lane++) { in intel_get_adjust_train()
3262 voltage_max = intel_dp_voltage_max(intel_dp); in intel_get_adjust_train()
3266 preemph_max = intel_dp_pre_emphasis_max(intel_dp, v); in intel_get_adjust_train()
3271 intel_dp->train_set[lane] = v | p; in intel_get_adjust_train()
3410 intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP) in intel_dp_set_signal_levels() argument
3412 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_signal_levels()
3416 uint8_t train_set = intel_dp->train_set[0]; in intel_dp_set_signal_levels()
3422 signal_levels = intel_chv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3425 signal_levels = intel_vlv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3444 intel_dp_set_link_train(struct intel_dp *intel_dp, in intel_dp_set_link_train() argument
3448 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_link_train()
3451 uint8_t buf[sizeof(intel_dp->train_set) + 1]; in intel_dp_set_link_train()
3454 _intel_dp_set_link_train(intel_dp, DP, dp_train_pat); in intel_dp_set_link_train()
3456 I915_WRITE(intel_dp->output_reg, *DP); in intel_dp_set_link_train()
3457 POSTING_READ(intel_dp->output_reg); in intel_dp_set_link_train()
3466 memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count); in intel_dp_set_link_train()
3467 len = intel_dp->lane_count + 1; in intel_dp_set_link_train()
3470 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET, in intel_dp_set_link_train()
3477 intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP, in intel_dp_reset_link_train() argument
3480 memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); in intel_dp_reset_link_train()
3481 intel_dp_set_signal_levels(intel_dp, DP); in intel_dp_reset_link_train()
3482 return intel_dp_set_link_train(intel_dp, DP, dp_train_pat); in intel_dp_reset_link_train()
3486 intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP, in intel_dp_update_link_train() argument
3489 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_update_link_train()
3494 intel_get_adjust_train(intel_dp, link_status); in intel_dp_update_link_train()
3495 intel_dp_set_signal_levels(intel_dp, DP); in intel_dp_update_link_train()
3497 I915_WRITE(intel_dp->output_reg, *DP); in intel_dp_update_link_train()
3498 POSTING_READ(intel_dp->output_reg); in intel_dp_update_link_train()
3500 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_update_link_train()
3501 intel_dp->train_set, intel_dp->lane_count); in intel_dp_update_link_train()
3503 return ret == intel_dp->lane_count; in intel_dp_update_link_train()
3506 static void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) in intel_dp_set_idle_link_train() argument
3508 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_idle_link_train()
3539 intel_dp_start_link_train(struct intel_dp *intel_dp) in intel_dp_start_link_train() argument
3541 struct drm_encoder *encoder = &dp_to_dig_port(intel_dp)->base.base; in intel_dp_start_link_train()
3546 uint32_t DP = intel_dp->DP; in intel_dp_start_link_train()
3553 link_config[0] = intel_dp->link_bw; in intel_dp_start_link_train()
3554 link_config[1] = intel_dp->lane_count; in intel_dp_start_link_train()
3555 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_start_link_train()
3557 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2); in intel_dp_start_link_train()
3558 if (intel_dp->num_sink_rates) in intel_dp_start_link_train()
3559 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET, in intel_dp_start_link_train()
3560 &intel_dp->rate_select, 1); in intel_dp_start_link_train()
3564 drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); in intel_dp_start_link_train()
3569 if (!intel_dp_reset_link_train(intel_dp, &DP, in intel_dp_start_link_train()
3582 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); in intel_dp_start_link_train()
3583 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_start_link_train()
3588 if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { in intel_dp_start_link_train()
3594 for (i = 0; i < intel_dp->lane_count; i++) in intel_dp_start_link_train()
3595 if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in intel_dp_start_link_train()
3597 if (i == intel_dp->lane_count) { in intel_dp_start_link_train()
3603 intel_dp_reset_link_train(intel_dp, &DP, in intel_dp_start_link_train()
3611 if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in intel_dp_start_link_train()
3619 voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in intel_dp_start_link_train()
3622 if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) { in intel_dp_start_link_train()
3628 intel_dp->DP = DP; in intel_dp_start_link_train()
3632 intel_dp_complete_link_train(struct intel_dp *intel_dp) in intel_dp_complete_link_train() argument
3636 uint32_t DP = intel_dp->DP; in intel_dp_complete_link_train()
3640 if (intel_dp->link_bw == DP_LINK_BW_5_4 || intel_dp->use_tps3) in intel_dp_complete_link_train()
3644 if (!intel_dp_set_link_train(intel_dp, &DP, in intel_dp_complete_link_train()
3662 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); in intel_dp_complete_link_train()
3663 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_complete_link_train()
3669 if (!drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { in intel_dp_complete_link_train()
3670 intel_dp_start_link_train(intel_dp); in intel_dp_complete_link_train()
3671 intel_dp_set_link_train(intel_dp, &DP, in intel_dp_complete_link_train()
3678 if (drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) { in intel_dp_complete_link_train()
3685 intel_dp_start_link_train(intel_dp); in intel_dp_complete_link_train()
3686 intel_dp_set_link_train(intel_dp, &DP, in intel_dp_complete_link_train()
3695 if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) { in intel_dp_complete_link_train()
3702 intel_dp_set_idle_link_train(intel_dp); in intel_dp_complete_link_train()
3704 intel_dp->DP = DP; in intel_dp_complete_link_train()
3711 void intel_dp_stop_link_train(struct intel_dp *intel_dp) in intel_dp_stop_link_train() argument
3713 intel_dp_set_link_train(intel_dp, &intel_dp->DP, in intel_dp_stop_link_train()
3718 intel_dp_link_down(struct intel_dp *intel_dp) in intel_dp_link_down() argument
3720 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_link_down()
3724 uint32_t DP = intel_dp->DP; in intel_dp_link_down()
3729 if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) in intel_dp_link_down()
3736 I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT); in intel_dp_link_down()
3742 I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); in intel_dp_link_down()
3744 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3747 I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) { in intel_dp_link_down()
3757 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3758 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3762 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in intel_dp_link_down()
3763 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3764 msleep(intel_dp->panel_power_down_delay); in intel_dp_link_down()
3768 intel_dp_get_dpcd(struct intel_dp *intel_dp) in intel_dp_get_dpcd() argument
3770 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_get_dpcd()
3775 if (intel_dp_dpcd_read_wake(&intel_dp->aux, 0x000, intel_dp->dpcd, in intel_dp_get_dpcd()
3776 sizeof(intel_dp->dpcd)) < 0) in intel_dp_get_dpcd()
3779 DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd); in intel_dp_get_dpcd()
3781 if (intel_dp->dpcd[DP_DPCD_REV] == 0) in intel_dp_get_dpcd()
3785 memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd)); in intel_dp_get_dpcd()
3786 if (is_edp(intel_dp)) { in intel_dp_get_dpcd()
3787 intel_dp_dpcd_read_wake(&intel_dp->aux, DP_PSR_SUPPORT, in intel_dp_get_dpcd()
3788 intel_dp->psr_dpcd, in intel_dp_get_dpcd()
3789 sizeof(intel_dp->psr_dpcd)); in intel_dp_get_dpcd()
3790 if (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED) { in intel_dp_get_dpcd()
3802 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 && in intel_dp_get_dpcd()
3803 intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED && in intel_dp_get_dpcd()
3805 intel_dp->use_tps3 = true; in intel_dp_get_dpcd()
3808 intel_dp->use_tps3 = false; in intel_dp_get_dpcd()
3811 if (is_edp(intel_dp) && in intel_dp_get_dpcd()
3812 (intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && in intel_dp_get_dpcd()
3813 (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV, &rev, 1) == 1) && in intel_dp_get_dpcd()
3818 intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_dpcd()
3830 intel_dp->sink_rates[i] = (val * 200) / 10; in intel_dp_get_dpcd()
3832 intel_dp->num_sink_rates = i; in intel_dp_get_dpcd()
3835 intel_dp_print_rates(intel_dp); in intel_dp_get_dpcd()
3837 if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_get_dpcd()
3841 if (intel_dp->dpcd[DP_DPCD_REV] == 0x10) in intel_dp_get_dpcd()
3844 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_DOWNSTREAM_PORT_0, in intel_dp_get_dpcd()
3845 intel_dp->downstream_ports, in intel_dp_get_dpcd()
3853 intel_dp_probe_oui(struct intel_dp *intel_dp) in intel_dp_probe_oui() argument
3857 if (!(intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in intel_dp_probe_oui()
3860 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SINK_OUI, buf, 3) == 3) in intel_dp_probe_oui()
3864 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_BRANCH_OUI, buf, 3) == 3) in intel_dp_probe_oui()
3870 intel_dp_probe_mst(struct intel_dp *intel_dp) in intel_dp_probe_mst() argument
3874 if (!intel_dp->can_mst) in intel_dp_probe_mst()
3877 if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) in intel_dp_probe_mst()
3880 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_MSTM_CAP, buf, 1)) { in intel_dp_probe_mst()
3883 intel_dp->is_mst = true; in intel_dp_probe_mst()
3886 intel_dp->is_mst = false; in intel_dp_probe_mst()
3890 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_probe_mst()
3891 return intel_dp->is_mst; in intel_dp_probe_mst()
3894 int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) in intel_dp_sink_crc() argument
3896 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_sink_crc()
3904 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) in intel_dp_sink_crc()
3910 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) in intel_dp_sink_crc()
3913 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, in intel_dp_sink_crc()
3917 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) in intel_dp_sink_crc()
3922 if (drm_dp_dpcd_readb(&intel_dp->aux, in intel_dp_sink_crc()
3933 if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) in intel_dp_sink_crc()
3936 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) in intel_dp_sink_crc()
3938 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, in intel_dp_sink_crc()
3946 intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq() argument
3948 return intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_sink_irq()
3954 intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq_esi() argument
3958 ret = intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_sink_irq_esi()
3968 intel_dp_handle_test_request(struct intel_dp *intel_dp) in intel_dp_handle_test_request() argument
3971 drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, DP_TEST_NAK); in intel_dp_handle_test_request()
3975 intel_dp_check_mst_status(struct intel_dp *intel_dp) in intel_dp_check_mst_status() argument
3979 if (intel_dp->is_mst) { in intel_dp_check_mst_status()
3984 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
3989 if (intel_dp->active_mst_links && !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) { in intel_dp_check_mst_status()
3991 intel_dp_start_link_train(intel_dp); in intel_dp_check_mst_status()
3992 intel_dp_complete_link_train(intel_dp); in intel_dp_check_mst_status()
3993 intel_dp_stop_link_train(intel_dp); in intel_dp_check_mst_status()
3997 ret = drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled); in intel_dp_check_mst_status()
4002 wret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_check_mst_status()
4010 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
4020 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_check_mst_status()
4022 intel_dp->is_mst = false; in intel_dp_check_mst_status()
4023 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_check_mst_status()
4040 intel_dp_check_link_status(struct intel_dp *intel_dp) in intel_dp_check_link_status() argument
4042 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_check_link_status()
4043 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_check_link_status()
4059 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_check_link_status()
4064 if (!intel_dp_get_dpcd(intel_dp)) { in intel_dp_check_link_status()
4069 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_check_link_status()
4070 intel_dp_get_sink_irq(intel_dp, &sink_irq_vector)) { in intel_dp_check_link_status()
4072 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_check_link_status()
4077 intel_dp_handle_test_request(intel_dp); in intel_dp_check_link_status()
4082 if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) { in intel_dp_check_link_status()
4085 intel_dp_start_link_train(intel_dp); in intel_dp_check_link_status()
4086 intel_dp_complete_link_train(intel_dp); in intel_dp_check_link_status()
4087 intel_dp_stop_link_train(intel_dp); in intel_dp_check_link_status()
4093 intel_dp_detect_dpcd(struct intel_dp *intel_dp) in intel_dp_detect_dpcd() argument
4095 uint8_t *dpcd = intel_dp->dpcd; in intel_dp_detect_dpcd()
4098 if (!intel_dp_get_dpcd(intel_dp)) in intel_dp_detect_dpcd()
4106 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_detect_dpcd()
4107 intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) { in intel_dp_detect_dpcd()
4110 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SINK_COUNT, in intel_dp_detect_dpcd()
4119 if (drm_probe_ddc(&intel_dp->aux.ddc)) in intel_dp_detect_dpcd()
4123 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in intel_dp_detect_dpcd()
4124 type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; in intel_dp_detect_dpcd()
4129 type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_detect_dpcd()
4142 edp_detect(struct intel_dp *intel_dp) in edp_detect() argument
4144 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_detect()
4155 ironlake_dp_detect(struct intel_dp *intel_dp) in ironlake_dp_detect() argument
4157 struct drm_device *dev = intel_dp_to_dev(intel_dp); in ironlake_dp_detect()
4159 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_dp_detect()
4164 return intel_dp_detect_dpcd(intel_dp); in ironlake_dp_detect()
4209 g4x_dp_detect(struct intel_dp *intel_dp) in g4x_dp_detect() argument
4211 struct drm_device *dev = intel_dp_to_dev(intel_dp); in g4x_dp_detect()
4212 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in g4x_dp_detect()
4216 if (is_edp(intel_dp)) { in g4x_dp_detect()
4231 return intel_dp_detect_dpcd(intel_dp); in g4x_dp_detect()
4235 intel_dp_get_edid(struct intel_dp *intel_dp) in intel_dp_get_edid() argument
4237 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_get_edid()
4248 &intel_dp->aux.ddc); in intel_dp_get_edid()
4252 intel_dp_set_edid(struct intel_dp *intel_dp) in intel_dp_set_edid() argument
4254 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_set_edid()
4257 edid = intel_dp_get_edid(intel_dp); in intel_dp_set_edid()
4260 if (intel_dp->force_audio != HDMI_AUDIO_AUTO) in intel_dp_set_edid()
4261 intel_dp->has_audio = intel_dp->force_audio == HDMI_AUDIO_ON; in intel_dp_set_edid()
4263 intel_dp->has_audio = drm_detect_monitor_audio(edid); in intel_dp_set_edid()
4267 intel_dp_unset_edid(struct intel_dp *intel_dp) in intel_dp_unset_edid() argument
4269 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_unset_edid()
4274 intel_dp->has_audio = false; in intel_dp_unset_edid()
4278 intel_dp_power_get(struct intel_dp *dp) in intel_dp_power_get()
4290 intel_dp_power_put(struct intel_dp *dp, in intel_dp_power_put()
4300 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_detect() local
4301 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_detect()
4310 intel_dp_unset_edid(intel_dp); in intel_dp_detect()
4312 if (intel_dp->is_mst) { in intel_dp_detect()
4319 power_domain = intel_dp_power_get(intel_dp); in intel_dp_detect()
4322 if (is_edp(intel_dp)) in intel_dp_detect()
4323 status = edp_detect(intel_dp); in intel_dp_detect()
4325 status = ironlake_dp_detect(intel_dp); in intel_dp_detect()
4327 status = g4x_dp_detect(intel_dp); in intel_dp_detect()
4331 intel_dp_probe_oui(intel_dp); in intel_dp_detect()
4333 ret = intel_dp_probe_mst(intel_dp); in intel_dp_detect()
4343 intel_dp_set_edid(intel_dp); in intel_dp_detect()
4350 intel_dp_power_put(intel_dp, power_domain); in intel_dp_detect()
4357 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_force() local
4358 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_force()
4363 intel_dp_unset_edid(intel_dp); in intel_dp_force()
4368 power_domain = intel_dp_power_get(intel_dp); in intel_dp_force()
4370 intel_dp_set_edid(intel_dp); in intel_dp_force()
4372 intel_dp_power_put(intel_dp, power_domain); in intel_dp_force()
4427 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_dp_set_property() local
4438 if (i == intel_dp->force_audio) in intel_dp_set_property()
4441 intel_dp->force_audio = i; in intel_dp_set_property()
4448 if (has_audio == intel_dp->has_audio) in intel_dp_set_property()
4451 intel_dp->has_audio = has_audio; in intel_dp_set_property()
4456 bool old_auto = intel_dp->color_range_auto; in intel_dp_set_property()
4457 uint32_t old_range = intel_dp->color_range; in intel_dp_set_property()
4461 intel_dp->color_range_auto = true; in intel_dp_set_property()
4464 intel_dp->color_range_auto = false; in intel_dp_set_property()
4465 intel_dp->color_range = 0; in intel_dp_set_property()
4468 intel_dp->color_range_auto = false; in intel_dp_set_property()
4469 intel_dp->color_range = DP_COLOR_RANGE_16_235; in intel_dp_set_property()
4475 if (old_auto == intel_dp->color_range_auto && in intel_dp_set_property()
4476 old_range == intel_dp->color_range) in intel_dp_set_property()
4482 if (is_edp(intel_dp) && in intel_dp_set_property()
4529 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_encoder_destroy() local
4531 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_encoder_destroy()
4533 if (is_edp(intel_dp)) { in intel_dp_encoder_destroy()
4534 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_destroy()
4539 pps_lock(intel_dp); in intel_dp_encoder_destroy()
4540 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_destroy()
4541 pps_unlock(intel_dp); in intel_dp_encoder_destroy()
4543 if (intel_dp->edp_notifier.notifier_call) { in intel_dp_encoder_destroy()
4544 unregister_reboot_notifier(&intel_dp->edp_notifier); in intel_dp_encoder_destroy()
4545 intel_dp->edp_notifier.notifier_call = NULL; in intel_dp_encoder_destroy()
4554 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_dp_encoder_suspend() local
4556 if (!is_edp(intel_dp)) in intel_dp_encoder_suspend()
4563 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_suspend()
4564 pps_lock(intel_dp); in intel_dp_encoder_suspend()
4565 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_suspend()
4566 pps_unlock(intel_dp); in intel_dp_encoder_suspend()
4569 static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) in intel_edp_panel_vdd_sanitize() argument
4571 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_edp_panel_vdd_sanitize()
4578 if (!edp_have_panel_vdd(intel_dp)) in intel_edp_panel_vdd_sanitize()
4591 edp_panel_vdd_schedule_off(intel_dp); in intel_edp_panel_vdd_sanitize()
4596 struct intel_dp *intel_dp; in intel_dp_encoder_reset() local
4601 intel_dp = enc_to_intel_dp(encoder); in intel_dp_encoder_reset()
4603 pps_lock(intel_dp); in intel_dp_encoder_reset()
4610 vlv_initial_power_sequencer_setup(intel_dp); in intel_dp_encoder_reset()
4612 intel_edp_panel_vdd_sanitize(intel_dp); in intel_dp_encoder_reset()
4614 pps_unlock(intel_dp); in intel_dp_encoder_reset()
4649 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_hpd_pulse() local
4688 if (!intel_dp_get_dpcd(intel_dp)) { in intel_dp_hpd_pulse()
4692 intel_dp_probe_oui(intel_dp); in intel_dp_hpd_pulse()
4694 if (!intel_dp_probe_mst(intel_dp)) { in intel_dp_hpd_pulse()
4696 intel_dp_check_link_status(intel_dp); in intel_dp_hpd_pulse()
4701 if (intel_dp->is_mst) { in intel_dp_hpd_pulse()
4702 if (intel_dp_check_mst_status(intel_dp) == -EINVAL) in intel_dp_hpd_pulse()
4706 if (!intel_dp->is_mst) { in intel_dp_hpd_pulse()
4708 intel_dp_check_link_status(intel_dp); in intel_dp_hpd_pulse()
4718 if (intel_dp->is_mst) { in intel_dp_hpd_pulse()
4719 …DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", intel_dp->is_mst, intel_dp->mst_mgr.ms… in intel_dp_hpd_pulse()
4720 intel_dp->is_mst = false; in intel_dp_hpd_pulse()
4721 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_hpd_pulse()
4735 struct intel_dp *intel_dp; in intel_trans_dp_port_sel() local
4738 intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_trans_dp_port_sel()
4742 return intel_dp->output_reg; in intel_trans_dp_port_sel()
4778 intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) in intel_dp_add_properties() argument
4784 intel_dp->color_range_auto = true; in intel_dp_add_properties()
4786 if (is_edp(intel_dp)) { in intel_dp_add_properties()
4796 static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) in intel_dp_init_panel_power_timestamps() argument
4798 intel_dp->last_power_cycle = jiffies; in intel_dp_init_panel_power_timestamps()
4799 intel_dp->last_power_on = jiffies; in intel_dp_init_panel_power_timestamps()
4800 intel_dp->last_backlight_off = jiffies; in intel_dp_init_panel_power_timestamps()
4805 struct intel_dp *intel_dp) in intel_dp_init_panel_power_sequencer() argument
4809 *final = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer()
4825 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in intel_dp_init_panel_power_sequencer()
4835 pp = ironlake_get_pp_control(intel_dp); in intel_dp_init_panel_power_sequencer()
4891 intel_dp->panel_power_up_delay = get_delay(t1_t3); in intel_dp_init_panel_power_sequencer()
4892 intel_dp->backlight_on_delay = get_delay(t8); in intel_dp_init_panel_power_sequencer()
4893 intel_dp->backlight_off_delay = get_delay(t9); in intel_dp_init_panel_power_sequencer()
4894 intel_dp->panel_power_down_delay = get_delay(t10); in intel_dp_init_panel_power_sequencer()
4895 intel_dp->panel_power_cycle_delay = get_delay(t11_t12); in intel_dp_init_panel_power_sequencer()
4899 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, in intel_dp_init_panel_power_sequencer()
4900 intel_dp->panel_power_cycle_delay); in intel_dp_init_panel_power_sequencer()
4903 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); in intel_dp_init_panel_power_sequencer()
4908 struct intel_dp *intel_dp) in intel_dp_init_panel_power_sequencer_registers() argument
4914 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_init_panel_power_sequencer_registers()
4915 const struct edp_power_seq *seq = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer_registers()
4924 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in intel_dp_init_panel_power_sequencer_registers()
4989 struct intel_dp *intel_dp = dev_priv->drrs.dp; in intel_dp_set_drrs_state() local
5000 if (intel_dp == NULL) { in intel_dp_set_drrs_state()
5010 dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_drrs_state()
5026 if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == in intel_dp_set_drrs_state()
5082 void intel_edp_drrs_enable(struct intel_dp *intel_dp) in intel_edp_drrs_enable() argument
5084 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_edp_drrs_enable()
5086 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_edp_drrs_enable()
5103 dev_priv->drrs.dp = intel_dp; in intel_edp_drrs_enable()
5114 void intel_edp_drrs_disable(struct intel_dp *intel_dp) in intel_edp_drrs_disable() argument
5116 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_edp_drrs_disable()
5118 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_edp_drrs_disable()
5133 intel_dp->attached_connector->panel. in intel_edp_drrs_disable()
5146 struct intel_dp *intel_dp; in intel_edp_drrs_downclock_work() local
5150 intel_dp = dev_priv->drrs.dp; in intel_edp_drrs_downclock_work()
5152 if (!intel_dp) in intel_edp_drrs_downclock_work()
5165 intel_dp->attached_connector->panel. in intel_edp_drrs_downclock_work()
5343 static bool intel_edp_init_connector(struct intel_dp *intel_dp, in intel_edp_init_connector() argument
5347 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_edp_init_connector()
5358 if (!is_edp(intel_dp)) in intel_edp_init_connector()
5361 pps_lock(intel_dp); in intel_edp_init_connector()
5362 intel_edp_panel_vdd_sanitize(intel_dp); in intel_edp_init_connector()
5363 pps_unlock(intel_dp); in intel_edp_init_connector()
5366 has_dpcd = intel_dp_get_dpcd(intel_dp); in intel_edp_init_connector()
5369 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) in intel_edp_init_connector()
5371 intel_dp->dpcd[DP_MAX_DOWNSPREAD] & in intel_edp_init_connector()
5380 pps_lock(intel_dp); in intel_edp_init_connector()
5381 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in intel_edp_init_connector()
5382 pps_unlock(intel_dp); in intel_edp_init_connector()
5385 edid = drm_get_edid(connector, &intel_dp->aux.ddc); in intel_edp_init_connector()
5420 intel_dp->edp_notifier.notifier_call = edp_notify_handler; in intel_edp_init_connector()
5421 register_reboot_notifier(&intel_dp->edp_notifier); in intel_edp_init_connector()
5429 pipe = DP_PORT_TO_PIPE_CHV(intel_dp->DP); in intel_edp_init_connector()
5431 pipe = PORT_TO_PIPE(intel_dp->DP); in intel_edp_init_connector()
5434 pipe = intel_dp->pps_pipe; in intel_edp_init_connector()
5455 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_init_connector() local
5462 intel_dp->pps_pipe = INVALID_PIPE; in intel_dp_init_connector()
5466 intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider; in intel_dp_init_connector()
5468 intel_dp->get_aux_clock_divider = vlv_get_aux_clock_divider; in intel_dp_init_connector()
5470 intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider; in intel_dp_init_connector()
5472 intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider; in intel_dp_init_connector()
5474 intel_dp->get_aux_clock_divider = i9xx_get_aux_clock_divider; in intel_dp_init_connector()
5477 intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl; in intel_dp_init_connector()
5479 intel_dp->get_aux_send_ctl = i9xx_get_aux_send_ctl; in intel_dp_init_connector()
5482 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_init_connector()
5483 intel_dp->attached_connector = intel_connector; in intel_dp_init_connector()
5499 if (WARN_ON(IS_VALLEYVIEW(dev) && is_edp(intel_dp) && in intel_dp_init_connector()
5513 INIT_DELAYED_WORK(&intel_dp->panel_vdd_work, in intel_dp_init_connector()
5543 if (is_edp(intel_dp)) { in intel_dp_init_connector()
5544 pps_lock(intel_dp); in intel_dp_init_connector()
5545 intel_dp_init_panel_power_timestamps(intel_dp); in intel_dp_init_connector()
5547 vlv_initial_power_sequencer_setup(intel_dp); in intel_dp_init_connector()
5549 intel_dp_init_panel_power_sequencer(dev, intel_dp); in intel_dp_init_connector()
5550 pps_unlock(intel_dp); in intel_dp_init_connector()
5553 intel_dp_aux_init(intel_dp, intel_connector); in intel_dp_init_connector()
5563 if (!intel_edp_init_connector(intel_dp, intel_connector)) { in intel_dp_init_connector()
5564 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_init_connector()
5565 if (is_edp(intel_dp)) { in intel_dp_init_connector()
5566 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_init_connector()
5571 pps_lock(intel_dp); in intel_dp_init_connector()
5572 edp_panel_vdd_off_sync(intel_dp); in intel_dp_init_connector()
5573 pps_unlock(intel_dp); in intel_dp_init_connector()
5580 intel_dp_add_properties(intel_dp, connector); in intel_dp_init_connector()