332 	uint32_t DP;  in vlv_power_sequencer_kick()  local
345 	DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in vlv_power_sequencer_kick()
346 	DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in vlv_power_sequencer_kick()
347 	DP |= DP_PORT_WIDTH(1);  in vlv_power_sequencer_kick()
348 	DP |= DP_LINK_TRAIN_PAT_1;  in vlv_power_sequencer_kick()
351 		DP |= DP_PIPE_SELECT_CHV(pipe);  in vlv_power_sequencer_kick()
353 		DP |= DP_PIPEB_SELECT;  in vlv_power_sequencer_kick()
371 	I915_WRITE(intel_dp->output_reg, DP);  in vlv_power_sequencer_kick()
374 	I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN);  in vlv_power_sequencer_kick()
377 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in vlv_power_sequencer_kick()
1504 		intel_dp->DP |= DP_PLL_FREQ_160MHZ;  in ironlake_set_pll_cpu_edp()
1507 		intel_dp->DP |= DP_PLL_FREQ_270MHZ;  in ironlake_set_pll_cpu_edp()
1545 	intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in intel_dp_prepare()
1548 	intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in intel_dp_prepare()
1549 	intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count);  in intel_dp_prepare()
1552 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_prepare()
1558 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
1560 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
1561 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
1564 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
1566 		intel_dp->DP |= crtc->pipe << 29;  in intel_dp_prepare()
1569 			intel_dp->DP |= intel_dp->color_range;  in intel_dp_prepare()
1572 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
1574 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
1575 		intel_dp->DP |= DP_LINK_TRAIN_OFF;  in intel_dp_prepare()
1578 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
1582 				intel_dp->DP |= DP_PIPEB_SELECT;  in intel_dp_prepare()
1584 			intel_dp->DP |= DP_PIPE_SELECT_CHV(crtc->pipe);  in intel_dp_prepare()
1587 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
2089 	intel_dp->DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE);  in ironlake_edp_pll_on()
2090 	intel_dp->DP |= DP_PLL_ENABLE;  in ironlake_edp_pll_on()
2091 	I915_WRITE(DP_A, intel_dp->DP);  in ironlake_edp_pll_on()
2374 			 uint32_t *DP,  in _intel_dp_set_link_train()  argument
2409 		*DP &= ~DP_LINK_TRAIN_MASK_CPT;  in _intel_dp_set_link_train()
2413 			*DP |= DP_LINK_TRAIN_OFF_CPT;  in _intel_dp_set_link_train()
2416 			*DP |= DP_LINK_TRAIN_PAT_1_CPT;  in _intel_dp_set_link_train()
2419 			*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in _intel_dp_set_link_train()
2423 			*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in _intel_dp_set_link_train()
2429 			*DP &= ~DP_LINK_TRAIN_MASK_CHV;  in _intel_dp_set_link_train()
2431 			*DP &= ~DP_LINK_TRAIN_MASK;  in _intel_dp_set_link_train()
2435 			*DP |= DP_LINK_TRAIN_OFF;  in _intel_dp_set_link_train()
2438 			*DP |= DP_LINK_TRAIN_PAT_1;  in _intel_dp_set_link_train()
2441 			*DP |= DP_LINK_TRAIN_PAT_2;  in _intel_dp_set_link_train()
2445 				*DP |= DP_LINK_TRAIN_PAT_3_CHV;  in _intel_dp_set_link_train()
2448 				*DP |= DP_LINK_TRAIN_PAT_2;  in _intel_dp_set_link_train()
2461 	_intel_dp_set_link_train(intel_dp, &intel_dp->DP,  in intel_dp_enable_port()
2464 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
2473 	intel_dp->DP |= DP_PORT_EN;  in intel_dp_enable_port()
2475 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
3410 intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)  in intel_dp_set_signal_levels()  argument
3440 	*DP = (*DP & ~mask) | signal_levels;  in intel_dp_set_signal_levels()
3445 			uint32_t *DP,  in intel_dp_set_link_train()  argument
3454 	_intel_dp_set_link_train(intel_dp, DP, dp_train_pat);  in intel_dp_set_link_train()
3456 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_set_link_train()
3477 intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,  in intel_dp_reset_link_train()  argument
3481 	intel_dp_set_signal_levels(intel_dp, DP);  in intel_dp_reset_link_train()
3482 	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);  in intel_dp_reset_link_train()
3486 intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP,  in intel_dp_update_link_train()  argument
3495 	intel_dp_set_signal_levels(intel_dp, DP);  in intel_dp_update_link_train()
3497 	I915_WRITE(intel_dp->output_reg, *DP);  in intel_dp_update_link_train()
3546 	uint32_t DP = intel_dp->DP;  in intel_dp_start_link_train()  local
3566 	DP |= DP_PORT_EN;  in intel_dp_start_link_train()
3569 	if (!intel_dp_reset_link_train(intel_dp, &DP,  in intel_dp_start_link_train()
3603 			intel_dp_reset_link_train(intel_dp, &DP,  in intel_dp_start_link_train()
3622 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_start_link_train()
3628 	intel_dp->DP = DP;  in intel_dp_start_link_train()
3636 	uint32_t DP = intel_dp->DP;  in intel_dp_complete_link_train()  local
3644 	if (!intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3671 			intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3686 			intel_dp_set_link_train(intel_dp, &DP,  in intel_dp_complete_link_train()
3695 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_complete_link_train()
3704 	intel_dp->DP = DP;  in intel_dp_complete_link_train()
3713 	intel_dp_set_link_train(intel_dp, &intel_dp->DP,  in intel_dp_stop_link_train()
3724 	uint32_t DP = intel_dp->DP;  in intel_dp_link_down()  local
3735 		DP &= ~DP_LINK_TRAIN_MASK_CPT;  in intel_dp_link_down()
3736 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT);  in intel_dp_link_down()
3739 			DP &= ~DP_LINK_TRAIN_MASK_CHV;  in intel_dp_link_down()
3741 			DP &= ~DP_LINK_TRAIN_MASK;  in intel_dp_link_down()
3742 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);  in intel_dp_link_down()
3756 		DP &= ~DP_PIPEB_SELECT;  in intel_dp_link_down()
3757 		I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
3761 	DP &= ~DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_link_down()
3762 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in intel_dp_link_down()
5429 			pipe = DP_PORT_TO_PIPE_CHV(intel_dp->DP);  in intel_edp_init_connector()
5431 			pipe = PORT_TO_PIPE(intel_dp->DP);  in intel_edp_init_connector()
5482 	intel_dp->DP = I915_READ(intel_dp->output_reg);  in intel_dp_init_connector()