403 static void vlv_clock(int refclk, intel_clock_t *clock)  in vlv_clock()  argument
409 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in vlv_clock()
463 intel_ironlake_limit(struct intel_crtc_state *crtc_state, int refclk)  in intel_ironlake_limit()  argument
470 			if (refclk == 100000)  in intel_ironlake_limit()
475 			if (refclk == 100000)  in intel_ironlake_limit()
509 intel_limit(struct intel_crtc_state *crtc_state, int refclk)  in intel_limit()  argument
515 		limit = intel_ironlake_limit(crtc_state, refclk);  in intel_limit()
544 static void pineview_clock(int refclk, intel_clock_t *clock)  in pineview_clock()  argument
550 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in pineview_clock()
559 static void i9xx_clock(int refclk, intel_clock_t *clock)  in i9xx_clock()  argument
565 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);  in i9xx_clock()
569 static void chv_clock(int refclk, intel_clock_t *clock)  in chv_clock()  argument
575 	clock->vco = DIV_ROUND_CLOSEST_ULL((uint64_t)refclk * clock->m,  in chv_clock()
624 		    int target, int refclk, intel_clock_t *match_clock,  in i9xx_find_best_dpll()  argument
663 					i9xx_clock(refclk, &clock);  in i9xx_find_best_dpll()
687 		   int target, int refclk, intel_clock_t *match_clock,  in pnv_find_best_dpll()  argument
724 					pineview_clock(refclk, &clock);  in pnv_find_best_dpll()
748 		   int target, int refclk, intel_clock_t *match_clock,  in g4x_find_best_dpll()  argument
785 					i9xx_clock(refclk, &clock);  in g4x_find_best_dpll()
847 		   int target, int refclk, intel_clock_t *match_clock,  in vlv_find_best_dpll()  argument
855 	int max_n = min(limit->n.max, refclk / 19200);  in vlv_find_best_dpll()
873 								     refclk * clock.m1);  in vlv_find_best_dpll()
875 					vlv_clock(refclk, &clock);  in vlv_find_best_dpll()
901 		   int target, int refclk, intel_clock_t *match_clock,  in chv_find_best_dpll()  argument
931 					clock.n) << 22, refclk * clock.m1);  in chv_find_best_dpll()
938 			chv_clock(refclk, &clock);  in chv_find_best_dpll()
6034 	int refclk;  in i9xx_get_refclk()  local
6039 		refclk = 100000;  in i9xx_get_refclk()
6042 		refclk = dev_priv->vbt.lvds_ssc_freq;  in i9xx_get_refclk()
6043 		DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk);  in i9xx_get_refclk()
6045 		refclk = 96000;  in i9xx_get_refclk()
6047 		refclk = 48000;  in i9xx_get_refclk()
6050 	return refclk;  in i9xx_get_refclk()
6786 	int refclk, num_connectors = 0;  in i9xx_crtc_compute_clock()  local
6824 		refclk = i9xx_get_refclk(crtc_state, num_connectors);  in i9xx_crtc_compute_clock()
6832 		limit = intel_limit(crtc_state, refclk);  in i9xx_crtc_compute_clock()
6835 						 refclk, NULL, &clock);  in i9xx_crtc_compute_clock()
6851 							    refclk, &clock,  in i9xx_crtc_compute_clock()
6917 	int refclk = 100000;  in vlv_crtc_clock_get()  local
6933 	vlv_clock(refclk, &clock);  in vlv_crtc_clock_get()
7017 	int refclk = 100000;  in chv_crtc_clock_get()  local
7032 	chv_clock(refclk, &clock);  in chv_crtc_clock_get()
7685 	int refclk;  in ironlake_compute_clocks()  local
7691 	refclk = ironlake_get_refclk(crtc_state);  in ironlake_compute_clocks()
7698 	limit = intel_limit(crtc_state, refclk);  in ironlake_compute_clocks()
7701 					  refclk, NULL, clock);  in ironlake_compute_clocks()
7715 						    refclk, clock,  in ironlake_compute_clocks()
9229 	int refclk = i9xx_pll_refclk(dev, pipe_config);  in i9xx_crtc_clock_get()  local
9269 			pineview_clock(refclk, &clock);  in i9xx_crtc_clock_get()
9271 			i9xx_clock(refclk, &clock);  in i9xx_crtc_clock_get()
9297 		i9xx_clock(refclk, &clock);  in i9xx_crtc_clock_get()