Lines Matching refs:pixel_format
2268 intel_tile_height(struct drm_device *dev, uint32_t pixel_format, in intel_tile_height() argument
2285 pixel_bytes = drm_format_plane_cpp(pixel_format, 0); in intel_tile_height()
2316 uint32_t pixel_format, uint64_t fb_format_modifier) in intel_fb_align_height() argument
2318 return ALIGN(height, intel_tile_height(dev, pixel_format, in intel_fb_align_height()
2339 info->pixel_format = fb->pixel_format; in intel_fill_fb_ggtt_view()
2567 mode_cmd.pixel_format = fb->pixel_format; in intel_alloc_initial_plane_obj()
2693 pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in i9xx_update_primary_plane()
2718 switch (fb->pixel_format) { in i9xx_update_primary_plane()
2819 pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in ironlake_update_primary_plane()
2828 switch (fb->pixel_format) { in ironlake_update_primary_plane()
2897 uint32_t pixel_format) in intel_fb_stride_alignment() argument
2899 u32 bits_per_pixel = drm_format_plane_cpp(pixel_format, 0) * 8; in intel_fb_stride_alignment()
2964 switch (fb->pixel_format) { in skylake_update_primary_plane()
3017 fb->pixel_format); in skylake_update_primary_plane()
6947 int fourcc, pixel_format; in i9xx_get_initial_plane_config() local
6971 pixel_format = val & DISPPLANE_PIXFORMAT_MASK; in i9xx_get_initial_plane_config()
6972 fourcc = i9xx_format_to_fourcc(pixel_format); in i9xx_get_initial_plane_config()
6973 fb->pixel_format = fourcc; in i9xx_get_initial_plane_config()
6995 fb->pixel_format, in i9xx_get_initial_plane_config()
8000 int fourcc, pixel_format; in skylake_get_initial_plane_config() local
8017 pixel_format = val & PLANE_CTL_FORMAT_MASK; in skylake_get_initial_plane_config()
8018 fourcc = skl_format_to_fourcc(pixel_format, in skylake_get_initial_plane_config()
8021 fb->pixel_format = fourcc; in skylake_get_initial_plane_config()
8055 fb->pixel_format); in skylake_get_initial_plane_config()
8059 fb->pixel_format, in skylake_get_initial_plane_config()
8108 int fourcc, pixel_format; in ironlake_get_initial_plane_config() local
8132 pixel_format = val & DISPPLANE_PIXFORMAT_MASK; in ironlake_get_initial_plane_config()
8133 fourcc = i9xx_format_to_fourcc(pixel_format); in ironlake_get_initial_plane_config()
8134 fb->pixel_format = fourcc; in ironlake_get_initial_plane_config()
8156 fb->pixel_format, in ironlake_get_initial_plane_config()
8942 mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth); in intel_framebuffer_create_for_mode()
10127 if (fb->pixel_format != crtc->primary->fb->pixel_format) in intel_crtc_page_flip()
10418 switch (fb->pixel_format) { in compute_baseline_pipe_bpp()
11882 } else if (set->fb->pixel_format != in intel_set_config_compute_mode_changes()
11883 set->crtc->primary->fb->pixel_format) { in intel_set_config_compute_mode_changes()
13231 uint32_t pixel_format) in intel_fb_pitch_limit() argument
13239 return min(8192*drm_format_plane_cpp(pixel_format, 0), 32768); in intel_fb_pitch_limit()
13305 mode_cmd->pixel_format); in intel_framebuffer_init()
13313 mode_cmd->pixel_format); in intel_framebuffer_init()
13330 switch (mode_cmd->pixel_format) { in intel_framebuffer_init()
13340 drm_get_format_name(mode_cmd->pixel_format)); in intel_framebuffer_init()
13352 drm_get_format_name(mode_cmd->pixel_format)); in intel_framebuffer_init()
13362 drm_get_format_name(mode_cmd->pixel_format)); in intel_framebuffer_init()
13368 drm_get_format_name(mode_cmd->pixel_format)); in intel_framebuffer_init()
13377 mode_cmd->pixel_format, in intel_framebuffer_init()