9669 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);  in intel_gen2_queue_flip()
9670 	intel_ring_emit(ring, MI_NOOP);  in intel_gen2_queue_flip()
9671 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen2_queue_flip()
9673 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen2_queue_flip()
9674 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen2_queue_flip()
9675 	intel_ring_emit(ring, 0); /* aux display base address, unused */  in intel_gen2_queue_flip()
9701 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);  in intel_gen3_queue_flip()
9702 	intel_ring_emit(ring, MI_NOOP);  in intel_gen3_queue_flip()
9703 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 |  in intel_gen3_queue_flip()
9705 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen3_queue_flip()
9706 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen3_queue_flip()
9707 	intel_ring_emit(ring, MI_NOOP);  in intel_gen3_queue_flip()
9734 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen4_queue_flip()
9736 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen4_queue_flip()
9737 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset |  in intel_gen4_queue_flip()
9746 	intel_ring_emit(ring, pf | pipesrc);  in intel_gen4_queue_flip()
9769 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen6_queue_flip()
9771 	intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);  in intel_gen6_queue_flip()
9772 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen6_queue_flip()
9782 	intel_ring_emit(ring, pf | pipesrc);  in intel_gen6_queue_flip()
9855 		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));  in intel_gen7_queue_flip()
9856 		intel_ring_emit(ring, DERRMR);  in intel_gen7_queue_flip()
9857 		intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |  in intel_gen7_queue_flip()
9861 			intel_ring_emit(ring, MI_STORE_REGISTER_MEM_GEN8(1) |  in intel_gen7_queue_flip()
9864 			intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1) |  in intel_gen7_queue_flip()
9866 		intel_ring_emit(ring, DERRMR);  in intel_gen7_queue_flip()
9867 		intel_ring_emit(ring, ring->scratch.gtt_offset + 256);  in intel_gen7_queue_flip()
9869 			intel_ring_emit(ring, 0);  in intel_gen7_queue_flip()
9870 			intel_ring_emit(ring, MI_NOOP);  in intel_gen7_queue_flip()
9874 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);  in intel_gen7_queue_flip()
9875 	intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));  in intel_gen7_queue_flip()
9876 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen7_queue_flip()
9877 	intel_ring_emit(ring, (MI_NOOP));  in intel_gen7_queue_flip()