1143 	struct intel_dpll_hw_state hw_state;  in assert_shared_dpll()  local
1149 	cur_state = pll->get_hw_state(dev_priv, pll, &hw_state);  in assert_shared_dpll()
4139 			   &pll->new_config->hw_state,  in intel_get_shared_dpll()
4140 			   sizeof(pll->new_config->hw_state)) == 0) {  in intel_get_shared_dpll()
4163 		pll->new_config->hw_state = crtc_state->dpll_hw_state;  in intel_get_shared_dpll()
11364 		I915_STATE_WARN(pll->on && memcmp(&pll->config.hw_state, &dpll_hw_state,  in check_shared_dpll_state()
12242 				      struct intel_dpll_hw_state *hw_state)  in ibx_pch_dpll_get_hw_state()  argument
12250 	hw_state->dpll = val;  in ibx_pch_dpll_get_hw_state()
12251 	hw_state->fp0 = I915_READ(PCH_FP0(pll->id));  in ibx_pch_dpll_get_hw_state()
12252 	hw_state->fp1 = I915_READ(PCH_FP1(pll->id));  in ibx_pch_dpll_get_hw_state()
12260 	I915_WRITE(PCH_FP0(pll->id), pll->config.hw_state.fp0);  in ibx_pch_dpll_mode_set()
12261 	I915_WRITE(PCH_FP1(pll->id), pll->config.hw_state.fp1);  in ibx_pch_dpll_mode_set()
12270 	I915_WRITE(PCH_DPLL(pll->id), pll->config.hw_state.dpll);  in ibx_pch_dpll_enable()
12281 	I915_WRITE(PCH_DPLL(pll->id), pll->config.hw_state.dpll);  in ibx_pch_dpll_enable()
14160 					    &pll->config.hw_state);  in intel_modeset_readout_hw_state()