8652 		unsigned int width = intel_crtc->base.cursor->state->crtc_w;  in i845_update_cursor()
8653 		unsigned int height = intel_crtc->base.cursor->state->crtc_h;  in i845_update_cursor()
8717 		switch (intel_crtc->base.cursor->state->crtc_w) {  in i9xx_update_cursor()
8728 				MISSING_CASE(intel_crtc->base.cursor->state->crtc_w);  in i9xx_update_cursor()
8737 	if (crtc->cursor->state->rotation == BIT(DRM_ROTATE_180))  in i9xx_update_cursor()
8775 		if (x + intel_crtc->base.cursor->state->crtc_w <= 0)  in intel_crtc_update_cursor()
8784 		if (y + intel_crtc->base.cursor->state->crtc_h <= 0)  in intel_crtc_update_cursor()
8799 	    crtc->cursor->state->rotation == BIT(DRM_ROTATE_180)) {  in intel_crtc_update_cursor()
8800 		base += (intel_crtc->base.cursor->state->crtc_h *  in intel_crtc_update_cursor()
8801 			intel_crtc->base.cursor->state->crtc_w - 1) * 4;  in intel_crtc_update_cursor()
11168 		hw_entry = &hw_ddb.cursor[pipe];  in check_wm_state()
11169 		sw_entry = &sw_ddb->cursor[pipe];  in check_wm_state()
12840 	struct intel_plane *cursor;  in intel_cursor_plane_create()  local
12843 	cursor = kzalloc(sizeof(*cursor), GFP_KERNEL);  in intel_cursor_plane_create()
12844 	if (cursor == NULL)  in intel_cursor_plane_create()
12847 	state = intel_create_plane_state(&cursor->base);  in intel_cursor_plane_create()
12849 		kfree(cursor);  in intel_cursor_plane_create()
12852 	cursor->base.state = &state->base;  in intel_cursor_plane_create()
12854 	cursor->can_scale = false;  in intel_cursor_plane_create()
12855 	cursor->max_downscale = 1;  in intel_cursor_plane_create()
12856 	cursor->pipe = pipe;  in intel_cursor_plane_create()
12857 	cursor->plane = pipe;  in intel_cursor_plane_create()
12858 	cursor->check_plane = intel_check_cursor_plane;  in intel_cursor_plane_create()
12859 	cursor->commit_plane = intel_commit_cursor_plane;  in intel_cursor_plane_create()
12861 	drm_universal_plane_init(dev, &cursor->base, 0,  in intel_cursor_plane_create()
12874 			drm_object_attach_property(&cursor->base.base,  in intel_cursor_plane_create()
12879 	drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs);  in intel_cursor_plane_create()
12881 	return &cursor->base;  in intel_cursor_plane_create()
12890 	struct drm_plane *cursor = NULL;  in intel_crtc_init()  local
12907 	cursor = intel_cursor_plane_create(dev, pipe);  in intel_crtc_init()
12908 	if (!cursor)  in intel_crtc_init()
12912 					cursor, &intel_crtc_funcs);  in intel_crtc_init()
12953 	if (cursor)  in intel_crtc_init()
12954 		drm_plane_cleanup(cursor);  in intel_crtc_init()
14448 	} cursor[I915_MAX_PIPES];  member
14511 		error->cursor[i].control = I915_READ(CURCNTR(i));  in intel_display_capture_error_state()
14512 		error->cursor[i].position = I915_READ(CURPOS(i));  in intel_display_capture_error_state()
14513 		error->cursor[i].base = I915_READ(CURBASE(i));  in intel_display_capture_error_state()
14600 		err_printf(m, "  CNTR: %08x\n", error->cursor[i].control);  in intel_display_print_error_state()
14601 		err_printf(m, "  POS: %08x\n", error->cursor[i].position);  in intel_display_print_error_state()
14602 		err_printf(m, "  BASE: %08x\n", error->cursor[i].base);  in intel_display_print_error_state()