12474 		intel_crtc->atomic.wait_for_flips = true;  in intel_check_primary_plane()
12490 			intel_crtc->atomic.disable_fbc = true;  in intel_check_primary_plane()
12500 				intel_crtc->atomic.wait_vblank = true;  in intel_check_primary_plane()
12511 			intel_crtc->atomic.disable_ips = true;  in intel_check_primary_plane()
12513 		intel_crtc->atomic.fb_bits |=  in intel_check_primary_plane()
12516 		intel_crtc->atomic.update_fbc = true;  in intel_check_primary_plane()
12519 			intel_crtc->atomic.update_wm = true;  in intel_check_primary_plane()
12578 		if (intel_crtc->atomic.disabled_planes &  in intel_begin_crtc_commit()
12598 	if (intel_crtc->atomic.wait_for_flips)  in intel_begin_crtc_commit()
12601 	if (intel_crtc->atomic.disable_fbc)  in intel_begin_crtc_commit()
12604 	if (intel_crtc->atomic.disable_ips)  in intel_begin_crtc_commit()
12607 	if (intel_crtc->atomic.pre_disable_primary)  in intel_begin_crtc_commit()
12610 	if (intel_crtc->atomic.update_wm)  in intel_begin_crtc_commit()
12617 		intel_crtc->atomic.evade =  in intel_begin_crtc_commit()
12619 						&intel_crtc->atomic.start_vbl_count);  in intel_begin_crtc_commit()
12629 	if (intel_crtc->atomic.evade)  in intel_finish_crtc_commit()
12631 				      intel_crtc->atomic.start_vbl_count);  in intel_finish_crtc_commit()
12635 	if (intel_crtc->atomic.wait_vblank)  in intel_finish_crtc_commit()
12638 	intel_frontbuffer_flip(dev, intel_crtc->atomic.fb_bits);  in intel_finish_crtc_commit()
12640 	if (intel_crtc->atomic.update_fbc) {  in intel_finish_crtc_commit()
12646 	if (intel_crtc->atomic.post_enable_primary)  in intel_finish_crtc_commit()
12650 		if (intel_crtc->atomic.update_sprite_watermarks & drm_plane_index(p))  in intel_finish_crtc_commit()
12654 	memset(&intel_crtc->atomic, 0, sizeof(intel_crtc->atomic));  in intel_finish_crtc_commit()
12793 			intel_crtc->atomic.update_wm = true;  in intel_check_cursor_plane()
12795 		intel_crtc->atomic.fb_bits |=  in intel_check_cursor_plane()