Lines Matching refs:PIPE_A
1238 enum pipe panel_pipe = PIPE_A; in assert_panel_unlocked()
1302 if ((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) || in assert_pipe()
1753 I915_WRITE(DPLL(PIPE_A), in i9xx_disable_pll()
1754 I915_READ(DPLL(PIPE_A)) & ~DPLL_DVO_2X_MODE); in i9xx_disable_pll()
1758 if ((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) || in i9xx_disable_pll()
1797 if (pipe != PIPE_A) in chv_disable_pll()
2127 WARN_ON(!((pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) || in intel_enable_pipe()
2175 if (!(pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) && in intel_disable_pipe()
3959 case PIPE_A: in ivybridge_update_fdi_bc_bifurcation()
4085 ironlake_pch_transcoder_set_timings(intel_crtc, PIPE_A); in lpt_pch_enable()
4587 return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A; in hsw_crtc_supports_ips()
5734 case PIPE_A: in ironlake_check_fdi_lanes()
5834 if ((crtc->pipe == PIPE_A || IS_I915G(dev)) && in intel_crtc_compute_config()
6280 if (pipe == PIPE_A) in vlv_prepare_pll()
6288 if (pipe == PIPE_A) in vlv_prepare_pll()
6313 if (crtc->pipe != PIPE_A) in chv_update_pll()
6726 if ((intel_crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) || in i9xx_set_pipeconf()
8565 tmp = I915_READ(FDI_RX_CTL(PIPE_A)); in haswell_get_ddi_port_state()
8596 trans_edp_pipe = PIPE_A; in haswell_get_pipe_config()
11294 if ((crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) || in check_crtc_state()
13989 crtc->pipe == PIPE_A && !crtc->active) { in intel_sanitize_crtc()