525 	} else if (IS_VALLEYVIEW(dev)) {  in intel_limit()
599 	if (!IS_PINEVIEW(dev) && !IS_VALLEYVIEW(dev))  in intel_PLL_is_valid()
603 	if (!IS_VALLEYVIEW(dev)) {  in intel_PLL_is_valid()
1254 	} else if (IS_VALLEYVIEW(dev)) {  in assert_panel_unlocked()
1382 	} else if (IS_VALLEYVIEW(dev)) {  in assert_sprites_disabled()
1567 	if (!IS_VALLEYVIEW(dev))  in intel_init_dpio()
1594 	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));  in vlv_enable_pll()
5481 		else if (IS_VALLEYVIEW(dev))  in i9xx_crtc_disable()
5861 	if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && pipe_config->pipe_bpp > 10*3) {  in intel_crtc_compute_config()
6038 	if (IS_VALLEYVIEW(dev)) {  in i9xx_get_refclk()
6734 	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {  in i9xx_set_pipeconf()
6774 	if (IS_VALLEYVIEW(dev) && intel_crtc->config->limited_color_range)  in i9xx_set_pipeconf()
6868 	} else if (IS_VALLEYVIEW(dev)) {  in i9xx_crtc_compute_clock()
7056 	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {  in i9xx_get_pipe_config()
7072 	if (IS_VALLEYVIEW(dev) && (tmp & PIPECONF_COLOR_RANGE_SELECT))  in i9xx_get_pipe_config()
7100 	if (!IS_VALLEYVIEW(dev)) {  in i9xx_get_pipe_config()
7120 	else if (IS_VALLEYVIEW(dev))  in i9xx_get_pipe_config()
10198 	if (IS_VALLEYVIEW(dev)) {  in intel_crtc_page_flip()
11053 	    IS_VALLEYVIEW(dev))  in intel_pipe_config_compare()
11549 	if (IS_VALLEYVIEW(dev)) {  in __intel_set_mode()
13038 	if (IS_VALLEYVIEW(dev) && !dev_priv->vbt.int_crt_support)  in intel_crt_present()
13106 	} else if (IS_VALLEYVIEW(dev)) {  in intel_setup_outputs()
13240 	} else if (gen >= 5 && !IS_VALLEYVIEW(dev)) {  in intel_fb_pitch_limit()
13433 	else if (IS_VALLEYVIEW(dev))  in intel_init_display()
13473 	} else if (IS_VALLEYVIEW(dev)) {  in intel_init_display()
13496 	if (IS_VALLEYVIEW(dev))  in intel_init_display()
13533 	} else if (IS_VALLEYVIEW(dev)) {  in intel_init_display()
13756 	if (IS_VALLEYVIEW(dev))  in intel_modeset_init_hw()