523 	} else if (IS_CHERRYVIEW(dev)) {  in intel_limit()
818 	if (IS_CHERRYVIEW(dev)) {  in vlv_PLL_is_optimal()
1450 	} else if (IS_CHERRYVIEW(dev_priv->dev)) {  in dp_pipe_enabled()
1469 	} else if (IS_CHERRYVIEW(dev_priv->dev)) {  in hdmi_pipe_enabled()
1575 	if (IS_CHERRYVIEW(dev)) {  in intel_init_dpio()
1633 	BUG_ON(!IS_CHERRYVIEW(dev_priv->dev));  in chv_enable_pll()
2710 	} else if (IS_CHERRYVIEW(dev) && plane == PLANE_B) {  in i9xx_update_primary_plane()
5138 	int limit = IS_CHERRYVIEW(dev_priv) ? 95 : 90;  in valleyview_calc_cdclk()
5153 	if (!IS_CHERRYVIEW(dev_priv) &&  in valleyview_calc_cdclk()
5201 	if (IS_CHERRYVIEW(dev_priv))  in vlv_program_pfi_credits()
5208 		if (IS_CHERRYVIEW(dev_priv))  in vlv_program_pfi_credits()
5252 		if (IS_CHERRYVIEW(dev))  in valleyview_modeset_global_resources()
5280 		if (IS_CHERRYVIEW(dev))  in valleyview_crtc_enable()
5291 	if (IS_CHERRYVIEW(dev) && pipe == PIPE_B) {  in valleyview_crtc_enable()
5309 		if (IS_CHERRYVIEW(dev))  in valleyview_crtc_enable()
5479 		if (IS_CHERRYVIEW(dev))  in i9xx_crtc_disable()
6152 		if (m2_n2 && (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen < 8) &&  in intel_cpu_transcoder_set_m_n()
6446 	if (IS_CHERRYVIEW(dev)) {  in vlv_force_pll_on()
6467 	if (IS_CHERRYVIEW(dev))  in vlv_force_pll_off()
6866 	} else if (IS_CHERRYVIEW(dev)) {  in i9xx_crtc_compute_clock()
7118 	if (IS_CHERRYVIEW(dev))  in i9xx_get_pipe_config()
13035 	if (IS_CHERRYVIEW(dev))  in intel_crt_present()
13132 		if (IS_CHERRYVIEW(dev)) {  in intel_setup_outputs()
13431 	else if (IS_CHERRYVIEW(dev))  in intel_init_display()