347 	u32 temp, i, rx_ctl_val;  in hsw_fdi_link_train()  local
410 		temp = I915_READ(_FDI_RXA_MISC);  in hsw_fdi_link_train()
411 		temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);  in hsw_fdi_link_train()
412 		I915_WRITE(_FDI_RXA_MISC, temp);  in hsw_fdi_link_train()
418 		temp = I915_READ(DP_TP_STATUS(PORT_E));  in hsw_fdi_link_train()
419 		if (temp & DP_TP_STATUS_AUTOTRAIN_DONE) {  in hsw_fdi_link_train()
432 		temp = I915_READ(DDI_BUF_CTL(PORT_E));  in hsw_fdi_link_train()
433 		temp &= ~DDI_BUF_CTL_ENABLE;  in hsw_fdi_link_train()
434 		I915_WRITE(DDI_BUF_CTL(PORT_E), temp);  in hsw_fdi_link_train()
438 		temp = I915_READ(DP_TP_CTL(PORT_E));  in hsw_fdi_link_train()
439 		temp &= ~(DP_TP_CTL_ENABLE | DP_TP_CTL_LINK_TRAIN_MASK);  in hsw_fdi_link_train()
440 		temp |= DP_TP_CTL_LINK_TRAIN_PAT1;  in hsw_fdi_link_train()
441 		I915_WRITE(DP_TP_CTL(PORT_E), temp);  in hsw_fdi_link_train()
451 		temp = I915_READ(_FDI_RXA_MISC);  in hsw_fdi_link_train()
452 		temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);  in hsw_fdi_link_train()
453 		temp |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);  in hsw_fdi_link_train()
454 		I915_WRITE(_FDI_RXA_MISC, temp);  in hsw_fdi_link_train()
1243 	uint32_t temp;  in intel_ddi_set_pipe_settings()  local
1246 		temp = TRANS_MSA_SYNC_CLK;  in intel_ddi_set_pipe_settings()
1249 			temp |= TRANS_MSA_6_BPC;  in intel_ddi_set_pipe_settings()
1252 			temp |= TRANS_MSA_8_BPC;  in intel_ddi_set_pipe_settings()
1255 			temp |= TRANS_MSA_10_BPC;  in intel_ddi_set_pipe_settings()
1258 			temp |= TRANS_MSA_12_BPC;  in intel_ddi_set_pipe_settings()
1263 		I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);  in intel_ddi_set_pipe_settings()
1273 	uint32_t temp;  in intel_ddi_set_vc_payload_alloc()  local
1274 	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));  in intel_ddi_set_vc_payload_alloc()
1276 		temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;  in intel_ddi_set_vc_payload_alloc()
1278 		temp &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;  in intel_ddi_set_vc_payload_alloc()
1279 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);  in intel_ddi_set_vc_payload_alloc()
1293 	uint32_t temp;  in intel_ddi_enable_transcoder_func()  local
1296 	temp = TRANS_DDI_FUNC_ENABLE;  in intel_ddi_enable_transcoder_func()
1297 	temp |= TRANS_DDI_SELECT_PORT(port);  in intel_ddi_enable_transcoder_func()
1301 		temp |= TRANS_DDI_BPC_6;  in intel_ddi_enable_transcoder_func()
1304 		temp |= TRANS_DDI_BPC_8;  in intel_ddi_enable_transcoder_func()
1307 		temp |= TRANS_DDI_BPC_10;  in intel_ddi_enable_transcoder_func()
1310 		temp |= TRANS_DDI_BPC_12;  in intel_ddi_enable_transcoder_func()
1317 		temp |= TRANS_DDI_PVSYNC;  in intel_ddi_enable_transcoder_func()
1319 		temp |= TRANS_DDI_PHSYNC;  in intel_ddi_enable_transcoder_func()
1331 				temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;  in intel_ddi_enable_transcoder_func()
1333 				temp |= TRANS_DDI_EDP_INPUT_A_ON;  in intel_ddi_enable_transcoder_func()
1336 			temp |= TRANS_DDI_EDP_INPUT_B_ONOFF;  in intel_ddi_enable_transcoder_func()
1339 			temp |= TRANS_DDI_EDP_INPUT_C_ONOFF;  in intel_ddi_enable_transcoder_func()
1349 			temp |= TRANS_DDI_MODE_SELECT_HDMI;  in intel_ddi_enable_transcoder_func()
1351 			temp |= TRANS_DDI_MODE_SELECT_DVI;  in intel_ddi_enable_transcoder_func()
1354 		temp |= TRANS_DDI_MODE_SELECT_FDI;  in intel_ddi_enable_transcoder_func()
1355 		temp |= (intel_crtc->config->fdi_lanes - 1) << 1;  in intel_ddi_enable_transcoder_func()
1362 			temp |= TRANS_DDI_MODE_SELECT_DP_MST;  in intel_ddi_enable_transcoder_func()
1364 			temp |= TRANS_DDI_MODE_SELECT_DP_SST;  in intel_ddi_enable_transcoder_func()
1366 		temp |= DDI_PORT_WIDTH(intel_dp->lane_count);  in intel_ddi_enable_transcoder_func()
1371 			temp |= TRANS_DDI_MODE_SELECT_DP_MST;  in intel_ddi_enable_transcoder_func()
1373 			temp |= TRANS_DDI_MODE_SELECT_DP_SST;  in intel_ddi_enable_transcoder_func()
1375 		temp |= DDI_PORT_WIDTH(intel_dp->lane_count);  in intel_ddi_enable_transcoder_func()
1381 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);  in intel_ddi_enable_transcoder_func()
2090 	u32 temp, flags = 0;  in intel_ddi_get_config()  local
2092 	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));  in intel_ddi_get_config()
2093 	if (temp & TRANS_DDI_PHSYNC)  in intel_ddi_get_config()
2097 	if (temp & TRANS_DDI_PVSYNC)  in intel_ddi_get_config()
2104 	switch (temp & TRANS_DDI_BPC_MASK) {  in intel_ddi_get_config()
2121 	switch (temp & TRANS_DDI_MODE_SELECT_MASK) {  in intel_ddi_get_config()
2142 		temp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);  in intel_ddi_get_config()
2143 		if (temp & AUDIO_OUTPUT_ENABLE(intel_crtc->pipe))  in intel_ddi_get_config()