287 		I915_WRITE(reg, ddi_translations[i].trans1);  in intel_prepare_ddi_buffers()
289 		I915_WRITE(reg, ddi_translations[i].trans2);  in intel_prepare_ddi_buffers()
299 	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans1);  in intel_prepare_ddi_buffers()
301 	I915_WRITE(reg, ddi_translations_hdmi[hdmi_level].trans2);  in intel_prepare_ddi_buffers()
356 	I915_WRITE(_FDI_RXA_MISC, FDI_RX_PWRDN_LANE1_VAL(2) |  in hsw_fdi_link_train()
364 	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);  in hsw_fdi_link_train()
370 	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);  in hsw_fdi_link_train()
373 	I915_WRITE(PORT_CLK_SEL(PORT_E), intel_crtc->config->ddi_pll_sel);  in hsw_fdi_link_train()
380 		I915_WRITE(DP_TP_CTL(PORT_E),  in hsw_fdi_link_train()
390 		I915_WRITE(DDI_BUF_CTL(PORT_E),  in hsw_fdi_link_train()
399 		I915_WRITE(_FDI_RXA_TUSIZE1, TU_SIZE(64));  in hsw_fdi_link_train()
403 		I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);  in hsw_fdi_link_train()
412 		I915_WRITE(_FDI_RXA_MISC, temp);  in hsw_fdi_link_train()
423 			I915_WRITE(DP_TP_CTL(PORT_E),  in hsw_fdi_link_train()
434 		I915_WRITE(DDI_BUF_CTL(PORT_E), temp);  in hsw_fdi_link_train()
441 		I915_WRITE(DP_TP_CTL(PORT_E), temp);  in hsw_fdi_link_train()
447 		I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);  in hsw_fdi_link_train()
454 		I915_WRITE(_FDI_RXA_MISC, temp);  in hsw_fdi_link_train()
1263 		I915_WRITE(TRANS_MSA_MISC(cpu_transcoder), temp);  in intel_ddi_set_pipe_settings()
1279 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);  in intel_ddi_set_vc_payload_alloc()
1381 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);  in intel_ddi_enable_transcoder_func()
1392 	I915_WRITE(reg, val);  in intel_ddi_disable_transcoder_func()
1508 		I915_WRITE(TRANS_CLK_SEL(cpu_transcoder),  in intel_ddi_enable_pipe_clock()
1518 		I915_WRITE(TRANS_CLK_SEL(cpu_transcoder),  in intel_ddi_disable_pipe_clock()
1554 			I915_WRITE(DPLL_CTRL1, val);  in intel_ddi_pre_enable()
1566 		I915_WRITE(DPLL_CTRL2, val);  in intel_ddi_pre_enable()
1570 		I915_WRITE(PORT_CLK_SEL(port), crtc->config->ddi_pll_sel);  in intel_ddi_pre_enable()
1605 		I915_WRITE(DDI_BUF_CTL(port), val);  in intel_ddi_post_disable()
1612 	I915_WRITE(DP_TP_CTL(port), val);  in intel_ddi_post_disable()
1625 		I915_WRITE(DPLL_CTRL2, (I915_READ(DPLL_CTRL2) |  in intel_ddi_post_disable()
1628 		I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);  in intel_ddi_post_disable()
1649 		I915_WRITE(DDI_BUF_CTL(port),  in intel_enable_ddi()
1794 	I915_WRITE(WRPLL_CTL(pll->id), pll->config.hw_state.wrpll);  in hsw_ddi_pll_enable()
1805 	I915_WRITE(WRPLL_CTL(pll->id), val & ~WRPLL_PLL_ENABLE);  in hsw_ddi_pll_disable()
1893 	I915_WRITE(DPLL_CTRL1, val);  in skl_ddi_pll_enable()
1896 	I915_WRITE(regs[pll->id].cfgcr1, pll->config.hw_state.cfgcr1);  in skl_ddi_pll_enable()
1897 	I915_WRITE(regs[pll->id].cfgcr2, pll->config.hw_state.cfgcr2);  in skl_ddi_pll_enable()
1902 	I915_WRITE(regs[pll->id].ctl,  in skl_ddi_pll_enable()
1915 	I915_WRITE(regs[pll->id].ctl,  in skl_ddi_pll_disable()
2010 			I915_WRITE(DDI_BUF_CTL(port), val);  in intel_ddi_prepare_link_retrain()
2017 		I915_WRITE(DP_TP_CTL(port), val);  in intel_ddi_prepare_link_retrain()
2033 	I915_WRITE(DP_TP_CTL(port), val);  in intel_ddi_prepare_link_retrain()
2037 	I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP);  in intel_ddi_prepare_link_retrain()
2053 	I915_WRITE(_FDI_RXA_CTL, val);  in intel_ddi_fdi_disable()
2058 	I915_WRITE(_FDI_RXA_MISC, val);  in intel_ddi_fdi_disable()
2062 	I915_WRITE(_FDI_RXA_CTL, val);  in intel_ddi_fdi_disable()
2066 	I915_WRITE(_FDI_RXA_CTL, val);  in intel_ddi_fdi_disable()