Lines Matching refs:u16
35 u16 version; /**< decimal */
36 u16 header_size; /**< in bytes */
37 u16 vbt_size; /**< in bytes */
46 u16 version; /**< decimal */
47 u16 header_size; /**< in bytes */
48 u16 bdb_size; /**< in bytes */
62 u16 code_segment;
210 u16 handle;
211 u16 device_type;
213 u16 addin_offset;
218 u16 edid_ptr;
227 u16 extended_type;
235 u16 handle;
236 u16 device_type;
241 u16 edid_ptr;
303 u16 ssc_bits;
304 u16 ssc_freq;
305 u16 ssc_ddt;
307 u16 panel_color_depth;
316 u16 fp_timing_offset; /* offsets are from start of bdb */
318 u16 dvo_timing_offset;
320 u16 panel_pnp_id_offset;
331 u16 x_res;
332 u16 y_res;
343 u16 terminator;
347 u16 clock; /**< In 10khz */
375 u16 mfg_name;
376 u16 product_code;
399 u16 pwm_freq_hz;
414 u16 aimdb_version;
415 u16 aimdb_header_size;
416 u16 aimdb_size;
421 u16 aimdb_size;
425 u16 fp_timing_offset;
427 u16 dvo_timing_offset;
429 u16 text_fitting_offset;
431 u16 graphics_fitting_offset;
445 u16 als_low_trip;
446 u16 als_high_trip;
472 u16 boot_mode_x;
473 u16 boot_mode_y;
477 u16 enable_lfp_primary:1;
478 u16 selective_mode_pruning:1;
479 u16 dual_frequency:1;
480 u16 render_clock_freq:1; /* 0: high freq; 1: low freq */
481 u16 nt_clone_support:1;
482 u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
483 u16 sprite_display_assign:1; /* 0: secondary; 1: primary */
484 u16 cui_aspect_scaling:1;
485 u16 preserve_aspect_ratio:1;
486 u16 sdvo_device_power_down:1;
487 u16 crt_hotplug:1;
488 u16 lvds_config:2;
489 u16 tv_hotplug:1;
490 u16 hdmi_config:2;
494 u16 legacy_crt_max_x;
495 u16 legacy_crt_max_y;
501 u16 rmpm_enabled:1;
502 u16 s2ddt_enabled:1;
503 u16 dpst_enabled:1;
504 u16 bltclt_enabled:1;
505 u16 adb_enabled:1;
506 u16 drrs_enabled:1;
507 u16 grs_enabled:1;
508 u16 gpmt_enabled:1;
509 u16 tbt_enabled:1;
510 u16 psr_enabled:1;
511 u16 ips_enabled:1;
512 u16 reserved3:4;
513 u16 pc_feature_valid:1;
534 u16 t1_t3;
535 u16 t8;
536 u16 t9;
537 u16 t10;
538 u16 t11_t12;
555 u16 edp_s3d_feature;
556 u16 edp_t3_optimization;
572 u16 tp1_wakeup_time;
573 u16 tp2_tp3_wakeup_time;
782 u16 panel_id;
820 u16 dual_link:2;
821 u16 lane_cnt:2;
822 u16 pixel_overlap:3;
823 u16 rsvd3:9;
825 u16 rsvd4;
840 u16 dphy_param_valid:1;
841 u16 eot_pkt_disabled:1;
842 u16 enable_clk_stop:1;
843 u16 rsvd7:13;
876 u16 tclk_prepare_clkzero;
882 u16 ths_prepare_hszero;
908 u16 panel_on_delay;
909 u16 bl_enable_delay;
910 u16 bl_disable_delay;
911 u16 panel_off_delay;
912 u16 panel_power_cycle_delay;