209 	return INTEL_INFO(dev_priv)->gen >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;  in gen6_pm_iir()
214 	return INTEL_INFO(dev_priv)->gen >= 8 ? GEN8_GT_IMR(2) : GEN6_PMIMR;  in gen6_pm_imr()
219 	return INTEL_INFO(dev_priv)->gen >= 8 ? GEN8_GT_IER(2) : GEN6_PMIER;  in gen6_pm_ier()
308 	if (INTEL_INFO(dev_priv)->gen <= 7 && !IS_HASWELL(dev_priv))  in gen6_sanitize_rps_pm_mask()
311 	if (INTEL_INFO(dev_priv)->gen >= 8)  in gen6_sanitize_rps_pm_mask()
487 	if (INTEL_INFO(dev)->gen >= 4)  in i915_enable_asle_pipestat()
684 	if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {  in i915_get_crtc_scanoutpos()
746 	if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {  in i915_get_crtc_scanoutpos()
1477 			WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev),  in intel_hpd_irq_handler()
1620 	if (INTEL_INFO(dev)->gen >= 3)  in i9xx_pipe_crc_irq_handler()
1625 	if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev))  in i9xx_pipe_crc_irq_handler()
1652 	if (INTEL_INFO(dev_priv)->gen >= 8)  in gen6_rps_irq_handler()
2132 		if (INTEL_INFO(dev)->gen >= 6)  in ironlake_irq_handler()
2142 		if (INTEL_INFO(dev)->gen >= 7)  in ironlake_irq_handler()
2148 	if (INTEL_INFO(dev)->gen >= 6) {  in ironlake_irq_handler()
2462 		if (INTEL_INFO(dev)->gen < 4) {  in i915_report_and_clear_eir()
2552 	if (INTEL_INFO(dev)->gen >= 4)  in i915_enable_vblank()
2567 	uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :  in ironlake_enable_vblank()
2622 	uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :  in ironlake_disable_vblank()
2663 	if (INTEL_INFO(dev)->gen >= 8) {  in ipehr_is_semaphore_wait()
2679 	if (INTEL_INFO(dev_priv->dev)->gen >= 8) {  in semaphore_wait_to_signaller_ring()
2726 	backwards = (INTEL_INFO(ring->dev)->gen >= 8) ? 5 : 4;  in semaphore_waits_for()
2748 	if (INTEL_INFO(ring->dev)->gen >= 8) {  in semaphore_waits_for()
2825 	if (INTEL_INFO(dev)->gen >= 6 && tmp & RING_WAIT_SEMAPHORE) {  in ring_stuck()
3022 	if (INTEL_INFO(dev)->gen >= 6)  in gen5_gt_irq_reset()
3215 	if (INTEL_INFO(dev)->gen >= 6) {  in gen5_gt_irq_postinstall()
3233 	if (INTEL_INFO(dev)->gen >= 7) {  in ironlake_irq_postinstall()
4248 	} else if (IS_G4X(dev_priv) || INTEL_INFO(dev_priv)->gen >= 5) {  in intel_irq_init()
4283 	} else if (INTEL_INFO(dev_priv)->gen >= 8) {  in intel_irq_init()
4300 		if (INTEL_INFO(dev_priv)->gen == 2) {  in intel_irq_init()
4305 		} else if (INTEL_INFO(dev_priv)->gen == 3) {  in intel_irq_init()