38 	struct drm_i915_gem_object *obj;  in i915_verify_lists()  local
44 	list_for_each_entry(obj, &dev_priv->render_ring.active_list, list) {  in i915_verify_lists()
45 		if (obj->base.dev != dev ||  in i915_verify_lists()
46 		    !atomic_read(&obj->base.refcount.refcount)) {  in i915_verify_lists()
47 			DRM_ERROR("freed render active %p\n", obj);  in i915_verify_lists()
50 		} else if (!obj->active ||  in i915_verify_lists()
51 			   (obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0) {  in i915_verify_lists()
53 				  obj,  in i915_verify_lists()
54 				  obj->active,  in i915_verify_lists()
55 				  obj->base.read_domains);  in i915_verify_lists()
57 		} else if (obj->base.write_domain && list_empty(&obj->gpu_write_list)) {  in i915_verify_lists()
59 				  obj,  in i915_verify_lists()
60 				  obj->base.write_domain,  in i915_verify_lists()
61 				  !list_empty(&obj->gpu_write_list));  in i915_verify_lists()
66 	list_for_each_entry(obj, &dev_priv->mm.flushing_list, list) {  in i915_verify_lists()
67 		if (obj->base.dev != dev ||  in i915_verify_lists()
68 		    !atomic_read(&obj->base.refcount.refcount)) {  in i915_verify_lists()
69 			DRM_ERROR("freed flushing %p\n", obj);  in i915_verify_lists()
72 		} else if (!obj->active ||  in i915_verify_lists()
73 			   (obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0 ||  in i915_verify_lists()
74 			   list_empty(&obj->gpu_write_list)) {  in i915_verify_lists()
76 				  obj,  in i915_verify_lists()
77 				  obj->active,  in i915_verify_lists()
78 				  obj->base.write_domain,  in i915_verify_lists()
79 				  !list_empty(&obj->gpu_write_list));  in i915_verify_lists()
84 	list_for_each_entry(obj, &dev_priv->mm.gpu_write_list, gpu_write_list) {  in i915_verify_lists()
85 		if (obj->base.dev != dev ||  in i915_verify_lists()
86 		    !atomic_read(&obj->base.refcount.refcount)) {  in i915_verify_lists()
87 			DRM_ERROR("freed gpu write %p\n", obj);  in i915_verify_lists()
90 		} else if (!obj->active ||  in i915_verify_lists()
91 			   (obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0) {  in i915_verify_lists()
93 				  obj,  in i915_verify_lists()
94 				  obj->active,  in i915_verify_lists()
95 				  obj->base.write_domain);  in i915_verify_lists()
100 	list_for_each_entry(obj, &i915_gtt_vm->inactive_list, list) {  in i915_verify_lists()
101 		if (obj->base.dev != dev ||  in i915_verify_lists()
102 		    !atomic_read(&obj->base.refcount.refcount)) {  in i915_verify_lists()
103 			DRM_ERROR("freed inactive %p\n", obj);  in i915_verify_lists()
106 		} else if (obj->pin_count || obj->active ||  in i915_verify_lists()
107 			   (obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {  in i915_verify_lists()
109 				  obj,  in i915_verify_lists()
110 				  obj->pin_count, obj->active,  in i915_verify_lists()
111 				  obj->base.write_domain);  in i915_verify_lists()