310 		struct intel_engine_cs *ring = &dev_priv->ring[i];  in i915_gem_context_reset()  local
311 		struct intel_context *lctx = ring->last_context;  in i915_gem_context_reset()
318 			ring->last_context = NULL;  in i915_gem_context_reset()
322 		if (ring->default_context)  in i915_gem_context_reset()
323 			ring->default_context->legacy_hw_ctx.initialized = false;  in i915_gem_context_reset()
335 	if (WARN_ON(dev_priv->ring[RCS].default_context))  in i915_gem_context_init()
359 		struct intel_engine_cs *ring = &dev_priv->ring[i];  in i915_gem_context_init()  local
362 		ring->default_context = ctx;  in i915_gem_context_init()
374 	struct intel_context *dctx = dev_priv->ring[RCS].default_context;  in i915_gem_context_fini()
389 		WARN_ON(!dev_priv->ring[RCS].last_context);  in i915_gem_context_fini()
390 		if (dev_priv->ring[RCS].last_context == dctx) {  in i915_gem_context_fini()
395 			dev_priv->ring[RCS].last_context = NULL;  in i915_gem_context_fini()
402 		struct intel_engine_cs *ring = &dev_priv->ring[i];  in i915_gem_context_fini()  local
404 		if (ring->last_context)  in i915_gem_context_fini()
405 			i915_gem_context_unreference(ring->last_context);  in i915_gem_context_fini()
407 		ring->default_context = NULL;  in i915_gem_context_fini()
408 		ring->last_context = NULL;  in i915_gem_context_fini()
416 	struct intel_engine_cs *ring;  in i915_gem_context_enable()  local
419 	BUG_ON(!dev_priv->ring[RCS].default_context);  in i915_gem_context_enable()
422 		for_each_ring(ring, dev_priv, i) {  in i915_gem_context_enable()
423 			if (ring->init_context) {  in i915_gem_context_enable()
424 				ret = ring->init_context(ring,  in i915_gem_context_enable()
425 						ring->default_context);  in i915_gem_context_enable()
435 		for_each_ring(ring, dev_priv, i) {  in i915_gem_context_enable()
436 			ret = i915_switch_context(ring, ring->default_context);  in i915_gem_context_enable()
492 mi_set_context(struct intel_engine_cs *ring,  in mi_set_context()  argument
499 		i915_semaphore_is_enabled(ring->dev) ?  in mi_set_context()
500 		hweight32(INTEL_INFO(ring->dev)->ring_mask) - 1 :  in mi_set_context()
509 	if (IS_GEN6(ring->dev)) {  in mi_set_context()
510 		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);  in mi_set_context()
516 	if (!IS_HASWELL(ring->dev) && INTEL_INFO(ring->dev)->gen < 8)  in mi_set_context()
521 	if (INTEL_INFO(ring->dev)->gen >= 7)  in mi_set_context()
524 	ret = intel_ring_begin(ring, len);  in mi_set_context()
529 	if (INTEL_INFO(ring->dev)->gen >= 7) {  in mi_set_context()
530 		intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);  in mi_set_context()
534 			intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings));  in mi_set_context()
535 			for_each_ring(signaller, to_i915(ring->dev), i) {  in mi_set_context()
536 				if (signaller == ring)  in mi_set_context()
539 				intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));  in mi_set_context()
540 				intel_ring_emit(ring, _MASKED_BIT_ENABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));  in mi_set_context()
545 	intel_ring_emit(ring, MI_NOOP);  in mi_set_context()
546 	intel_ring_emit(ring, MI_SET_CONTEXT);  in mi_set_context()
547 	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->legacy_hw_ctx.rcs_state) |  in mi_set_context()
553 	intel_ring_emit(ring, MI_NOOP);  in mi_set_context()
555 	if (INTEL_INFO(ring->dev)->gen >= 7) {  in mi_set_context()
559 			intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(num_rings));  in mi_set_context()
560 			for_each_ring(signaller, to_i915(ring->dev), i) {  in mi_set_context()
561 				if (signaller == ring)  in mi_set_context()
564 				intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base));  in mi_set_context()
565 				intel_ring_emit(ring, _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE));  in mi_set_context()
568 		intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);  in mi_set_context()
571 	intel_ring_advance(ring);  in mi_set_context()
576 static inline bool should_skip_switch(struct intel_engine_cs *ring,  in should_skip_switch()  argument
580 	struct drm_i915_private *dev_priv = ring->dev->dev_private;  in should_skip_switch()
586 		if (from == to && !test_bit(ring->id,  in should_skip_switch()
590 		if (from == to && !test_bit(ring->id,  in should_skip_switch()
599 needs_pd_load_pre(struct intel_engine_cs *ring, struct intel_context *to)  in needs_pd_load_pre()  argument
601 	struct drm_i915_private *dev_priv = ring->dev->dev_private;  in needs_pd_load_pre()
606 	if (INTEL_INFO(ring->dev)->gen < 8)  in needs_pd_load_pre()
609 	if (ring != &dev_priv->ring[RCS])  in needs_pd_load_pre()
616 needs_pd_load_post(struct intel_engine_cs *ring, struct intel_context *to,  in needs_pd_load_post()  argument
619 	struct drm_i915_private *dev_priv = ring->dev->dev_private;  in needs_pd_load_post()
624 	if (!IS_GEN8(ring->dev))  in needs_pd_load_post()
627 	if (ring != &dev_priv->ring[RCS])  in needs_pd_load_post()
636 static int do_switch(struct intel_engine_cs *ring,  in do_switch()  argument
639 	struct drm_i915_private *dev_priv = ring->dev->dev_private;  in do_switch()
640 	struct intel_context *from = ring->last_context;  in do_switch()
646 	if (from != NULL && ring == &dev_priv->ring[RCS]) {  in do_switch()
651 	if (should_skip_switch(ring, from, to))  in do_switch()
655 	if (ring == &dev_priv->ring[RCS]) {  in do_switch()
657 					    get_context_alignment(ring->dev), 0);  in do_switch()
667 	from = ring->last_context;  in do_switch()
669 	if (needs_pd_load_pre(ring, to)) {  in do_switch()
674 		trace_switch_mm(ring, to);  in do_switch()
675 		ret = to->ppgtt->switch_mm(to->ppgtt, ring);  in do_switch()
680 		clear_bit(ring->id, &to->ppgtt->pd_dirty_rings);  in do_switch()
683 	if (ring != &dev_priv->ring[RCS]) {  in do_switch()
718 			test_and_clear_bit(ring->id, &to->ppgtt->pd_dirty_rings))  in do_switch()
722 	WARN_ON(needs_pd_load_pre(ring, to) &&  in do_switch()
723 			needs_pd_load_post(ring, to, hw_flags));  in do_switch()
725 	ret = mi_set_context(ring, to, hw_flags);  in do_switch()
732 	if (needs_pd_load_post(ring, to, hw_flags)) {  in do_switch()
733 		trace_switch_mm(ring, to);  in do_switch()
734 		ret = to->ppgtt->switch_mm(to->ppgtt, ring);  in do_switch()
750 		ret = i915_gem_l3_remap(ring, i);  in do_switch()
766 		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->legacy_hw_ctx.rcs_state), ring);  in do_switch()
776 			from->legacy_hw_ctx.rcs_state->last_read_req) != ring);  in do_switch()
788 	ring->last_context = to;  in do_switch()
791 		if (ring->init_context) {  in do_switch()
792 			ret = ring->init_context(ring, to);  in do_switch()
801 	if (ring->id == RCS)  in do_switch()
820 int i915_switch_context(struct intel_engine_cs *ring,  in i915_switch_context()  argument
823 	struct drm_i915_private *dev_priv = ring->dev->dev_private;  in i915_switch_context()
829 		if (to != ring->last_context) {  in i915_switch_context()
831 			if (ring->last_context)  in i915_switch_context()
832 				i915_gem_context_unreference(ring->last_context);  in i915_switch_context()
833 			ring->last_context = to;  in i915_switch_context()
838 	return do_switch(ring, to);  in i915_switch_context()