Lines Matching refs:drm_i915_private
267 struct drm_i915_private;
324 void (*mode_set)(struct drm_i915_private *dev_priv,
326 void (*enable)(struct drm_i915_private *dev_priv,
328 void (*disable)(struct drm_i915_private *dev_priv,
330 bool (*get_hw_state)(struct drm_i915_private *dev_priv,
617 void (*force_wake_get)(struct drm_i915_private *dev_priv,
619 void (*force_wake_put)(struct drm_i915_private *dev_priv,
622 uint8_t (*mmio_readb)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
623 uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
624 uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
625 uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
627 void (*mmio_writeb)(struct drm_i915_private *dev_priv, off_t offset,
629 void (*mmio_writew)(struct drm_i915_private *dev_priv, off_t offset,
631 void (*mmio_writel)(struct drm_i915_private *dev_priv, off_t offset,
633 void (*mmio_writeq)(struct drm_i915_private *dev_priv, off_t offset,
646 struct drm_i915_private *i915;
916 struct drm_i915_private *dev_priv;
1075 struct drm_i915_private;
1085 void (*sync_hw)(struct drm_i915_private *dev_priv,
1092 void (*enable)(struct drm_i915_private *dev_priv,
1098 void (*disable)(struct drm_i915_private *dev_priv,
1101 bool (*is_enabled)(struct drm_i915_private *dev_priv,
1224 struct drm_i915_private *i915;
1564 struct drm_i915_private { struct
1838 static inline struct drm_i915_private *to_i915(const struct drm_device *dev) in to_i915() argument
1843 static inline struct drm_i915_private *dev_to_i915(struct device *dev) in dev_to_i915()
2165 struct drm_i915_private *dev_priv;
2271 struct drm_i915_private *__p; \
2272 if (__builtin_types_compatible_p(typeof(*p), struct drm_i915_private)) \
2273 __p = (struct drm_i915_private *)p; \
2493 extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
2494 extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
2495 extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv);
2496 extern void i915_update_gfx_val(struct drm_i915_private *dev_priv);
2497 int vlv_force_gfx_clock(struct drm_i915_private *dev_priv, bool on);
2498 void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
2506 extern void intel_irq_init(struct drm_i915_private *dev_priv);
2507 extern void intel_hpd_init(struct drm_i915_private *dev_priv);
2508 int intel_irq_install(struct drm_i915_private *dev_priv);
2509 void intel_irq_uninstall(struct drm_i915_private *dev_priv);
2519 void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
2521 void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
2523 void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
2530 i915_enable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
2534 i915_disable_pipestat(struct drm_i915_private *dev_priv, enum pipe pipe,
2537 void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv);
2538 void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
2540 ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
2542 ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
2543 void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
2612 void i915_init_vm(struct drm_i915_private *dev_priv,
2637 void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv);
2728 static inline bool i915_stop_ring_allow_ban(struct drm_i915_private *dev_priv) in i915_stop_ring_allow_ban()
2734 static inline bool i915_stop_ring_allow_warn(struct drm_i915_private *dev_priv) in i915_stop_ring_allow_warn()
2840 (&((struct drm_i915_private *)(obj)->base.dev->dev_private)->gtt.base)
2844 &((struct drm_i915_private *)(vm)->dev->dev_private)->gtt.base; in i915_is_ggtt()
2896 int i915_gem_context_enable(struct drm_i915_private *dev_priv);
2962 unsigned long i915_gem_shrink(struct drm_i915_private *dev_priv,
2968 unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv);
2969 void i915_gem_shrinker_init(struct drm_i915_private *dev_priv);
2975 struct drm_i915_private *dev_priv = obj->base.dev->dev_private; in i915_gem_object_needs_bit17_swizzle()
3007 struct drm_i915_private *i915,
3022 const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
3060 struct drm_i915_private *dev_priv, unsigned port);
3119 extern void intel_set_memory_cxsr(struct drm_i915_private *dev_priv,
3141 int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u32 mbox, u32 *val);
3142 int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u32 mbox, u32 val);
3145 u32 vlv_punit_read(struct drm_i915_private *dev_priv, u32 addr);
3146 void vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val);
3147 u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
3148 u32 vlv_gpio_nc_read(struct drm_i915_private *dev_priv, u32 reg);
3149 void vlv_gpio_nc_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3150 u32 vlv_cck_read(struct drm_i915_private *dev_priv, u32 reg);
3151 void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3152 u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
3153 void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3154 u32 vlv_bunit_read(struct drm_i915_private *dev_priv, u32 reg);
3155 void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3156 u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg);
3157 void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3158 u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
3159 void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
3160 u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
3162 void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
3164 u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
3165 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
3167 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
3168 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);