Lines Matching refs:INTEL_INFO
142 #define sprite_name(p, s) ((p) * INTEL_INFO(dev)->num_sprites[(p)] + (s) + 'A')
228 for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
231 (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] + 1; \
235 (__s) < INTEL_INFO(__dev_priv)->num_sprites[(__p)]; \
2280 #define INTEL_INFO(p) (&__I915__(p)->info) macro
2281 #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id)
2286 #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x)
2288 #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)
2291 #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
2292 #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater)
2293 #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline)
2295 #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
2298 #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)
2299 #define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
2301 #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge)
2305 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview)
2306 #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
2307 #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell)
2308 #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
2309 #define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake)
2310 #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
2340 #define IS_GEN2(dev) (INTEL_INFO(dev)->gen == 2)
2341 #define IS_GEN3(dev) (INTEL_INFO(dev)->gen == 3)
2342 #define IS_GEN4(dev) (INTEL_INFO(dev)->gen == 4)
2343 #define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5)
2344 #define IS_GEN6(dev) (INTEL_INFO(dev)->gen == 6)
2345 #define IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7)
2346 #define IS_GEN8(dev) (INTEL_INFO(dev)->gen == 8)
2347 #define IS_GEN9(dev) (INTEL_INFO(dev)->gen == 9)
2354 #define HAS_BSD(dev) (INTEL_INFO(dev)->ring_mask & BSD_RING)
2355 #define HAS_BSD2(dev) (INTEL_INFO(dev)->ring_mask & BSD2_RING)
2356 #define HAS_BLT(dev) (INTEL_INFO(dev)->ring_mask & BLT_RING)
2357 #define HAS_VEBOX(dev) (INTEL_INFO(dev)->ring_mask & VEBOX_RING)
2358 #define HAS_LLC(dev) (INTEL_INFO(dev)->has_llc)
2361 #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
2363 #define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6)
2364 #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8)
2368 #define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay)
2369 #define OVERLAY_NEEDS_PHYSICAL(dev) (INTEL_INFO(dev)->overlay_needs_physical)
2379 #define HAS_AUX_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
2380 #define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5)
2390 #define SUPPORTS_TV(dev) (INTEL_INFO(dev)->supports_tv)
2391 #define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)
2393 #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
2394 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
2395 #define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
2399 #define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi)
2400 #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg)
2406 #define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6)
2407 #define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))
2426 #define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || IS_VALLEYVIEW(dev))
2944 if (INTEL_INFO(dev)->gen < 6) in i915_gem_chipset_flush()
3214 else if (INTEL_INFO(dev)->gen >= 5) in i915_vgacntrl_reg()